### 2.1 Understanding the TKGate Interface

The main components of the TKGate edit window consists of a menu bar and button bar at the top, the module, net and port lists on the left, a status bar on the bottom, and the main editing area in the center. Scrollbars can be used to scroll the circuit, the list of modules or the list of nets. The "Modules" list in the upper left corner of the display lists the modules which are part of the circuit being edited. The top-level module is indicated with a "+" symbol after its name. Below the module list is the list of nets in the current module. Multi-bit nets are indicated with a bit range after them. Net names can be either "hidden" or "visible" depending on whether they are displayed in the circuit window. Hidden nets are indicated in the net list with a trailing "@". The "X" symbol in the editing window is the current mark. The mark is used to indicate the position for new gates.

(click to enlarge)

Frequently used commands can be accessed through the tkgate button bar. These include commands for opening, saving and printing circuit files, changing the editing tool, opening and closing modules and controlling the simulator. The button bar also has a selector to choose a default technology for newly created gates. See "Editing Gate Properties" for more information on gate technologies.

The status bar on the bottom indicates the file that is being edited, and the current module from that file that is displayed in the circuit window. A "*" after the file name indicates that the buffer has been modified since the last time the file was saved. Below the file and module name is a message bar for informational messages from TKGate. These messages include confirmation for files that are loaded or saved, or information on the currently selected gate or wire.

In the lower right corner of the interface is the mode icon. The possible mode icons are:

| Edit Mode
| Simulation Mode (simulator stopped)
| Simulation Mode (simulator running)
| Analysis Mode

"Balloon help" is available for many of the elements in the interface, typically on the prompt text. To use balloon help, simply move the mouse cursor over an interface element. After about one second, an informational help message will be displayed as long as the mouse cursor has not moved. For example, moving the mouse cursor over the "Nets:" label on the main window produces a balloon help message as shown below:

Balloon help is also available in most of the dialog boxes. Position the cursor over the text in a dialog box to view a more detailed description.

### 2.2 Loading and Saving Circuits

Opening and saving circuits as well as circuit printing operations are done through the "File" menu option on the main window. To load a file into TKGate, you can either specify the file name on the command line when you start, or select "Open..." from the "File" menu. You can also use the keyboard shortcut Ctl-X Ctl-F. When opening a new file, all existing modules will be flushed from the buffer, and the modules in the new file will be loaded. TkGate save files have the extension ".v" and are in a Verilog netlist-like format. The major difference is the addition of anotating comments for information such as cicuit elements and wire positions. Also, gates with no explicit counter part in Verilog such as switches and clock generators are saved as anotation comments in the save file. Libraries are loaded using the "Open Library..." selection. Modules from the library are added to the current circuit and marked as library modules. However, any non-empty non-library modules in the current circuit will not be overloaded. Furthermore, any modules marked as library modules will not be saved when saving a circuit. Library modules are indicated in the module list with parentheses, and can be converted to regular user modules using the "Claim..." command on the "Modules" menu. To save a circuit, select "Save" to save in the current file, or "Save..." to specify a file name to save to.

All operations involving opening or saving a file use a dialog box such as:

for selecting files. Enter a file name at the prompt and press the "Open" (or "Save") button, or double click on a file name. Only the appropriate type of files will be displayed. You can change directories by double clicking on a folder to open it, or by using the button in the upper right corner to move up to the parent folder.

### 2.3 TkGate Options

TKGate has several user configurable parameters that can be set by selecting "Options..." under the "File" menu. The options are divided into four main categories which are selectable through a tab box. Option settings are persistent, being saved in the file ".tkgate-preferences" in the user's home directory which is read whenever starting TkGate. General options, print options and color options are described below. Simulator option are described in the section on the simulator.

The basic options are:

- Site: Indicates the name of the organization where this copy of TkGate is installed. This string will be used on any reports generated by TkGate.
- Smooth Scrolling: If this option is enabled, scrolling in the main window will be performed using bitmap copies rather than redisplays significantly improving scrolling performance. If your X server has problems with bitmap copies, you can disable this feature.
- Region Update: Controls the screen redraw algorithm. Enabling this option will cause redraw events to redraw only the portion of the screen which changes rather than the whole screen. Normally this option should be left enabled, but on X servers with poor clipping implementations, enabling this feature may actually result in slower redrawing.
- Outline Move Modules: This option can be used to reduce redraw time on very slow servers. Enabling this option will disable dynamic redrawing of module instances (and the wires attached to them) while they are being moved. Instead only an outline of the instance will be moved and the wires will be moved when the instance is placed.
- Enable Help Balloons: Causes help messages to be displayed when the mouse cursor is over certain user interface elements.
- Enable Debugging: Enables certain debugging features useful for debugging TkGate.
- Novice Mode: This option causes a tutorial circuit to be automatically loaded when you start TkGate. The tutorial circuit will only appear when you do not explicitly specify a circuit on the command line. Unselect this option to disable loading of the tutorial circuit.
- Do Checkpointing/Frequency: This option enables periodic checkpointing of unsaved files. The checkpoint file will have the same base name as the file you are editing surrounded by '#' characters. It will be saved in the current directory. The frequency specifies a time interval between checkpoints in seconds.
- Max Undo: This option specifies the maximum number of operations that can be undone using the undo/redo feature.

The printing options are:

- Print Command: If output to the printer is selected, this field indicates the printer command used to output the file. The command is opened as a pipe, and postscript is written to its standard input.
- Paper Size: Indicates the paper size of the document. If your printer is multi-tray, the appropriate tray will be selected. A variety of U.S. and European/Asian paper sizes are provided.
- Orientation: Indicates the orientation of the diagram on the page. If you select "Portrait", the image will be printed so that the long side of the paper is vertical. If you select "Landscape", the image will be printed so that the short side is vertical.
- Print Double-Sided: Indicates that images should be printed on both sides of the page. This option is only effective on printers capable of double-sided printing.
- Scale large modules to fit page: Modules which cannot fit on a single page without scaling will be reduced in size so they fit.
- Partition large modules into multiple pages:Modules which cannot fit on a single page without scaling will be split into multiple pages. A key indicating which portion a page represents will be printed in the lower right corner of the page.
- Include index: Prints an index page listing each of the modules in alphabetical order and the pages they are on.
- Include hierarchy graph: Prints a hierarchy graph rooted at the top-level module showing the relationship between parent and child modules.
- Print small modules four per page: Causes modules which can fit into a single quadrant to be grouped and printed on the same page.

The color options are:

- Instaces: Sets the color used for primitive gates and their labels.
- Modules: Sets the color used for modules, other than the port names.
- Module Ports: Sets the color used for port names on modules.
- Frames: Sets the color used for frames.
- Comments: Sets the color used for normal comments.
- Hyperlinks: Sets the color used for hyperlink comments.
- Single-Bit Wires: Sets the color used for single-bit wires and their labels.
- Multi-Bit Wires: Sets the color used for multi-bit wires and their labels.
- Gate Tools: Sets the color for other non-cursor objects used by tkgate (e.g., probes).
- Scope Grid: Sets the color for the grid in the logic scope.
- Logic One: Sets the color for all deterministic non-zero logic values in the logic scope.
- Logic Zero: Sets the color for zero logic values in the logic scope.
- Float: Sets the color for floating logic values in the logic scope.
- Unknown/Conflict: Sets the color for unknown logic values, including the "low" and "high" values, in the logic scope.
- Off LED: Sets the color for LEDs which are off.
- On LED: Sets the color for LEDs which are on.
- Floating LED: Sets the color for LEDs for which the input signal is a non 0/1 value. in the logic scope.

### 2.4 Basic Editing Tools

Cursor | Shortcut Key | Description
--- | --- | ---
| F1 | The Move/Connect tool is indicated by the arrow cursor. Use this tool for most editing operations including creating gates, connecting wires, moving gates and wires, opening module instances, opening property boxes of gates and wires, and deleting circuit elements (with the "delete" key).
| (F1) | The Connect tool is indicated by the soldering iron cursor. To use this tool, first select the move/connect tool and then press and hold the left mouse button on a wire endpoint. The cursor will then change to the connect tool as long as you are holding down the mouse button.
| F2 | The Delete Gate tool is indicated by the IC extractor cursor. Use this tool to delete gates. Note that gates can also be deleted using the move/connect tool by selecting a circuit element and hitting the delete key.
| F3 | TheWire Cutter tool is indicated by the wire cutter cursor. Use this tool to cut wires by clicking on the wire at the point you want to cut it. If you cut a wire with an unconnected end, the wire segments between the cut point and the unconnected end will be deleted automatically.
| F4 | The Inverter tool is indicated by the inverter bubble grabber cursors. Use this tool to add or remove inverter bubbles on the inputs and outputs of gates. Click the cursor near an input or output to converter a non-inverting port to an inverting port or vice-versa.
| F5 | The Wire Size tool is indicated by the ribbon cable cursor. Use this mode to change the bit width of a wire. When you enter this mode, a wire size entry box will appear in the lower right corner of the main window. You can then enter a bit size here and click the cursor on wires to change their size to the target size. You can also change wire bit widths using the gate or wire properties box.

### 2.5 Creating Gates

gThere are three main ways to create gates in tkgate: using the menu bar, using popup menus, and using keyboard shortcuts. Once you have mastered the keyboard shortcuts, that is generally the perfered way to create gates. These three methods are described in the following sections.

#### 2.5.1 Creating a Gate Using the Menu Bar

| To create a gate such as a NAND gate, first select the Move/Connect tool, and then press the left mouse button at the position you wish to create it. While you are holding the mouse button down, the cursor will change to an outline arrow to indicate the current orientation. In the case shown at the left, the current orientation is 0 degrees indicating the standard orientation.
| When you release the button the arrow will disappear and the mark symbol will remain. The mark indicates the center point for the new circuit element. Clicking the left mouse button at another location will move the mark, and selecting a gate or wire will clear the mark.
| Select the gate type by opening the "Make" menu. The circuit elements are organized into five basic types. "Switch" types include switches, dip switches, power sources, clocks, etc. "Gate" types include the basic logic gates such as AND and OR gates. "Reduction" types include reduction versions of the basic gates types which combine multi-bit signals into a single bit, "MSI/LSI" types include registers, adders, multiplier, shifters, etc. Finally, "Module" types include user defined modules and module pin gates.
| After selecting the menu option or typing the shortcut, the circuit element will be created and displayed in bold to indicate that it is selected.

#### 2.5.2 Creating a Gate Using the Popup Menu

| To create a gate using the popup menu, right click on the position at which you wish to create a gate. This will both create the position mark and bring up the popup menu. Then select "Make", and then maneuver through the gate category to select the appropriate gate type.

#### 2.5.3 Creating a Gate Using Keyboard Shortcuts

To create a gate using keyboard shortcuts, first set a mark in the same way as when creating a gate using the menu bar (Section 2.5.1). Then simply type the shortcut for the gate you wish to create. Most of the gate types have single character commands to create them. For example, you can type "a" to create an AND gate, and "A" to create a NAND gate. A list of the gate types and their keyboard shortcuts are shown in Section 2.16.

### 2.6 Connecting Gates

| Connecting a Wire Endpoint to Another Endpoint
--- | ---
| To connect the ports on two gates, first make sure you have selected the "Move/Connect" tool from the "Tool" menu. Then click and hold the left mouse button on the endpoint of one of the ends you wish to connect. The mouse cursor will change to a soldering iron to indicate that connect mode is active.
| Next, drag the mouse toward the other endpoint you wish to connect to, TKGate will automatically introduce any necessary bends and maintain connections with only horizontal and vertical segments.
| Finally release the mouse button near the target endpoint.
| TKGate will then connect the wires.

:

| Connecting Three or More Ports on a Net
--- | ---
| To connect a wire to an already connected segment, first select a free endpoint to get the soldering iron.
| Then drag the wire near the wire you want to connect to.
| When you release the wire, it will connect to a nearby wire segment (or corner) and create a solder joint.
| You can continue the process to connect as many ports to a net as necessary.

### 2.7 Moving Gates and Wires

| Moving a Single Gate
--- | ---
| To move a single gate, press and hold the left mouse button on the gate you wish to move. The selected gate will be shown in bold.
| While holding the mouse left mouse button down drag the gate to the new position. Any wires connected to the gate will move along with it. For very fine adjustments, you can also move the selected gate using the arrow keys.

| Moving a Group of Gates
--- | ---
| To move a group of gates, first select the Move/Connect tool and press and hold the left mouse button at some point near, but not directly on the group you wish to move. The "X" mark should appear just as if you were going to create a new gate.
| Next, while holding the left mouse button drag the cursor to enclose a group of gates. The box will appear after moving the cursor a few millimeters. Release the mouse button to select the circuit elements enclosed in the box. The gates will remain selected until you click on a gate not in the selection, or click on an empty part of the canvas. If you do this operation while holding the control key, you can add gates to the selection rather than create a new selection.
| After selecting a set of gates, click and hold the mouse cursor on one of the selected elements.
| You can then move the entire group to a new position.

### 2.8 Editing Gate Properties

Gate parameters can be edited by double clicking on a gate, or by selecting the gate and then invoking the "Properties..." command from the "Gate" menu. The property dialog box is contains up to four pages which can be selected through the tabs at the top. The "General" page contains basic properties that are common to all gate types, the "Port" page allows editing of ports on the gate, the optional "Details" page contains additional properties that are special to particular gate types, and the optional "Delay" page allows editing of delay parameters of gates.

#### 2.8.1 General Properties

The properties which can be edited on the "General" page shown to the right are:

- Gate Type: The type of the gate. This property is immutable.
- Gate Name: The name of the gate. This must be a unique identifier for the gate within the module. Gate names must start with a letter or the '_' character, and must contain only letters digits and the '_' character. If you attempt to use a gate name which is used by another circuit element in the same module, or attempt to use illegal character, the name will by automatically adjusted by removing the illegal characters, or by appending or prepending characters.
- Hide Name: A flag to indicate whether or not the name for the gate should be displayed. The default is not to display names unless this option is explicitly set.
- Anchor: A flag to indicate wherther or not the gate can be moved using the mouse. A selection containing gates with this option active cannot be moved.
- X/Y: The screen position of the gate. Values can be manually entered even if a gate is anchored.
- Critical Path Partition: Makes the selected element a partition point for the purpose of critical path analysis. Paths through an element with this property will not be considered for the purpose of critical path analysis.

#### 2.8.2 Port Properties

The "Ports" page contains a list of all the ports on the selected gate. To edit ports on a gate, double click on the port you wish to modify, or select a port and hit the "Edit..." button. This will cause the port parameters dialog box to appear. You can change the signal name or the bit width, but the port name and type may not be editable for all element types. You can also use the "Add.." and "Delete" buttons to add new ports or delete ports for some element types.

The port properties are:

- Signal Name: The name of the signal. The signal name must be unique within the module and has the same restrictions as gate names.
- Port Name: The name of the port the signal is attached to. The port name can only be changed for module instances.
- Type: The direction (input, output, bidirectional) of the port. The type can only be changed for module instances.
- Bit Width: The number of bits in the signal.

#### 2.8.3 Detail Properties

The "Details" page of the gate parameters dialog box is used to set special properties for certain types of gates. The example shown to the right is for a "clock" element. You can set the pulsewidth, phase and duty cycle either by entering numbers in the entry boxes, or by dragging points on the waveform diagram. The cycle width is the number of epochs in a clock cycle, the phase is the percent into the clock cycle at which the simulation will start, and the duty is the percent of time in the clock cycle that the clock is high.

Other types of gates which take detailed parameters include modules which require a function name, memories for which a memory initialization file can be specified, and switches for which an initital value can be specified.

A few gate types have properties boxes which are unique to the gate type. For example, module ports have a dialog box similar to the dialog box for nets described in the next section, and comments have dialog boxes consisting of a text entry for updating the comment text.

#### 2.8.4 Delay Properties

Delay for gates can be set either by specifying a standard technology or by customizing the delay for each individual gate. To use a standard technology, select "Standard Delay" and select a technology from the selector button. You can choose one of the built-in technologies "default" or "unit" that comes with tkgate, or add additional technology definitions (see Gate Delay Files for details). The "default" technology is roughly based on CMOS delays, and the "unit" technology simply sets single epoch delays for everything. Note that the delay values shown here can be affected by the bit-width of the ports, the number of ports and the existance/absence of inverters on the ports of gates. In some cases, adding an inverter to a port on a gate can decrease the delay value (e.g., adding an inverter to change an AND into a NAND).

To set the delay values for an individual gate, select "Custom Delay" and enter values for each of the delay parameters in epochs. Delays values must be interers greater than or equal to one, and less than 4096.

### 2.9 Editing Wire Properties

Wire properties can be edited by either double clicking on a wire, by double clicking on a net name from the "Nets" list, or by selecting a net from the "Nets" list and then invoking the "Properties..." command from the "Gate" menu.

The net properties are:

- Net Name: The signal name of the net. Signal names must be unique within the module in which they are defined. Signal names must start with a letter or the '_' character, and must contain only letters digits and the '_' character. If you attempt to reuse a name within a module, or to use an illegal character, the name will be automatically adjusted by removing the illegal characters, or by appending or prepending characters. Signal names that begin with a '_', will be displayed with an overbar to indicate an active low signal. In this case, the leading '_' itself will not be displayed.
- Hide Name: A flag to indicate whether or not the name for the signal should be displayed. The default is not to display names unless this option is explicitly set.
- Bit Width: The number of bits in the signal.
- Port Type: The direction (input, output, bidirectional) if this signal is a module port. If the signal is not a module port, this field will not be displayed.

### 2.10 Using Modules

A module definition consists of two ports, an implementation, and an interface. The implementation is the "contents" of the module, and the interface defines the appearance of module instances including the size of module instances, the port positions, and directions around the module. Module definitions can be manipulated using the "New...", "Delete...", "Copy...", "Rename..." and "Claim.." options from the "Module" menu.

Modules can be used to create hierarcical designs. To create a module, set the mark and choose "Module Instance" from the "Module" submenu of the "Make" menu. This will cause the dialog box at the right to appear with the entry for "Function" active. Enter a function name and press return. The function specifies the type of module. You can use any of the functions listed in the "Modules" list on the left part of the screen, or create a new module type by entering a new name. When you set the function name of a newly created gate, the standard interface for that function type will be created. See the section on module interfaces for details.

#### 2.10.1 Editing Module Implementations

To edit the contents of a module, double click on the module name from the "Modules" list on the left portion of the main window. Alternatively, select any instance of the module with the mouse and select the "Open" option from the "Module" menu. Within the module you can use any of the gates you would use at a higher level including more module instances. The special gates "Module Input", "Module Output" and "Module InOut" from the "Module" sub-menu of the "Make" menu can be used to indicate the internal connections for ports. For each port name, only one port element can be created. When you create a port element, a dialog box will appear allowing you to set the name of the port.

#### 2.10.2 Editing Module Interfaces

There are two methods for add ports to a module. In one method, you first select the module to add the port to, and the choose "Add Input", "Add Output", or "Add Bidir" from the "Gate" menu. The cursor will change to indicate a temporary mode. Click the mouse pointer near the edge of the module instance where you wish to add the port. A dialog box will appear allowing you to set the name. An alternative method is to right click near the edge of a module instance and select ont of the "Add" options from the popup menu. The same dialog box as with the previous method will appear.

You can adjust the position of a port by dragging it along the attached edge by selecting it near the edge of the module instance. To delete a port, use the wire cutter tool and click near the edge of the module instance. Modules can be resized by dragging an edge or corner. You can also change the type (input, output or inout) of a port either by right clicking on and selecting "Change Input" to cycle through the types, or by double clicking on it and selecting a type through the dialog box.

For each module instance, there is a "standard" size and port arrangement which is used when creating new module instances. You can make any existing instance of a module type the standard implementation by selecting it and choosing "Set Interface" from the "Module" menu. You can also select "Edit Interfaces" from the "Module" menu to switch to a special screen which displays the module instances for all of the defined module types. You can edit the sizes, add or deleted ports, or modify the positions of ports of any of the modules displayed. To exit the interface window, choose "Close" from the "Module", or double click on a module from the module list.

### 2.11 Searching for Gates and Wires

You can search for wires and gates anywhere in your circuit by using the "Find..." option from the "Edit" menu. Enter some text into the dialog box and hit the "Find" button to find occurrences of gates or wires which contain the specified text as part of their names. Each time you hit the "Find" button, TkGate will advance to the next hit, select the gate or wire and mark it with an "X". You can also choose to limit your search to wires only or gates only. The current search will be restarted when you change the text you are searching for, when you change the search mode, or when you make any modifications to the circuit.

### 2.12 Hyperlinks

TkGate supports a limited hyperlink capability through the "Comment" gate type. When clicking on a hyperlink comment, some action such as opening a new file or searching for a gate or wire will be performed. Note that since clicking on the hyperlink causes an action to be performed, it is necessary to press and hold a modifier key (Shift, Control, or Alt) in order to move or select it.

To create a hyperlink, create or edit a comment gate, set the "Text is Hyperlink" flag and enter the link location in the "Link to File" box. When specifying a file, you may use the following codes which will be replaced according to the table below.

Code | Replacement
--- | ---
@T | TkGate tutorial directory.
@E | TkGate examples directory.
@H | TkGate home directory.
@C | Directory of currently open circuit.

If the specified file is a circuit, the current file will be discarded and the new file loaded. If there are any unsaved changes in the current file, and it is not marked "discard changes", a confirmation box will appear before following the link. If the specified file is not a circuit file, the text contents of the file will be displayed in a separate window. You can force a file to be treated as a verilog file by prepending the string "tkgate:", and you can force it to be treated as text by prepending it with "text:".

If a link contains the '#' character, the text after it is treated as a gate or wire name. When the link is followed TkGate will search for the specified gate or wire and set "crosshairs" on it. In the special case where the link starts with a '#', the search is performed in the current circuit. The gate/wire specified must be a full path specifier. That is a wire "w4" in a module with instance name "m1" (not function name) would be specified with the link "#m1.w4".

### 2.13 Printing a Schematic

To print a circuit, choose the "Print..." option from the "File" menu. You can choose to print directly to a printer using a specified print command, or you can print to a file. When printing a single-page document to a file, you can also choose to save the circuit in encapsulated postscript. This will suppress printing of the page frame and title.

The printing options are:

- Output to: Indicates whether generated output should be written to a file, or sent directly to the printer.
- Print Command: If output to the printer is selected, this field indicates the printer command used to output the file. The command is opened as a pipe, and postscript is written to its standard input.
- File Name: If output to a file is selected, this field indicates the name of the output file. The default name is the name of the current circuit name with the extension renamed to ".ps". You can use the "Browse..." button to bring up a file name browser.
- Save as Encapsulated Postscript: If thi option is enabled, the circuit will be saved as an Encapsulated Postscript file suitable for inclusion into a document. Printing of the title bar and the frame will be suppressed. Only single-page documents can be save In Encapsulated Postscript format.
- Paper Size: Indicates the paper size of the document. If your printer is multi-tray, the appropriate tray will be selected. A variety of U.S. and European/Asian paper sizes are provided.
- Orientation: Indicates the orientation of the diagram on the page. If you select "Portrait", the image will be printed so that the long side of the paper is vertical. If you select "Landscape", the image will be printed so that the short side is vertical.
- Print Double-Sided: Indicates that images should be printed on both sides of the page. This option is only effective on printers capable of double-sided printing.
- Document Title: Indicates the title of the document. This string will be printed on each page of the output. The default is the name of the circuit file.
- Scale large modules to fit page: Modules which cannot fit on a single page without scaling will be reduced in size so they fit.
- Partition large modules into multiple pages:Modules which cannot fit on a single page without scaling will be split into multiple pages. A key indicating which portion a page represents will be printed in the lower right corner of the page.
- Include index: Prints an index page listing each of the modules in alphabetical order and the pages they are on.
- Include hierarchy graph: Prints a hierarchy graph rooted at the top-level module showing the relationship between parent and child modules.
- Print small modules four per page: Causes modules which can fit into a single quadrant to be grouped and printed on the same page.
- Print Modules: Indicates which modules should be printed. The options are:
  - all: All modules in the current document will be printed.
  - current: Only the module in displayed in the main editing window will be printed.
  - used: Only the top-level module and any of its sub-modules will be printed.
  - selected: Only modules selected in the list box below will be printed.
- Include library modules: Normally modules marked as being loaded from a library will not be printed. Enable this option to print these modules.

### 2.14 Popup Menus

Many Of The Features Described In This Manual Can Also Be Accessed Using The Context Sensitive Popup Menus. The Popup Menus Are Obtained By Pressing The Right Mouse Button, And The Menu Items That Appear Depend On What Was Selected. The contexts that TkGate recognizes are shown in the table below.

Context | Desctipion
--- | ---
Wire | Popop menus for wires allow you to open the properties box for the wire, or add a branch segment to a wire to allow you to connect it to another gate or wire.
Gate | Popup menus for common gates allow you to open the properties box for the gate, set or clear the anchor flag, or delete the gate.
Variable Input Gate | For variable input gates such as AND and OR gates, you can also add inputs through the popup menus in addition to the standard gate functions.
Multi-Gate Selection | When multiple gates are selected, you can set or clear the anchor flag for all of the gates in the selection, or delete the entire selection.
4-Wire Joint | The popup menu for joint with four attached wire contains only the anchor set/clear option.
3-Wire Joint | For joints with three wires attached, an additional add wire segment option allows you to attach a wire to the unused side of the joint.
Module | In addition to the standard gate functions, the popup menu for modules also allows you to open the block, mark the block as the standard interface for a module type, and add/change ports to/on the module.
Canvas | Right clicking on the canvas where there are no objects brings up a popup menu with options to close the current module, create a gate/module or change the current tool.
Non-Move Mode | When TkGate is not in Move/Connect mode, only the close module and change tool options are enabled
simulation | When in simulation mode, the popup menu allows you to use any of the simulation menu functions.

### 2.15 Circuit Options

Circuits have several global properies which can be set by selecting "Circuit Properties..." from the "Module" menu. This will cause the dialog box shown at the right to appear.

The circuit options are:

- Top-Level Module The top-level module is the highest-level module in your circuit. Click on a module in the list box to make it the top-level module. The top-level module should contain no module port instances.
- Initialization Scripts: Indicates a list of TkGate simulation scrips which will be automatically executed when the simulator is started. If a filename does not start with a '/', the current directory, the directory ontaining the circuit file and the user's home directory will be searched for the file.
- File Version: This is the version of tkgate under which the file being edited was saved.
- Discard Changes: Enabling this option disables warnings when discarding a modified circuit by exiting TkGate, by loading a new circuit, or by creating a new circuit. Normally, this option is only used by the example and tutorial circuits that come with TkGate. Enabling this option is not recommended for user circuits.
- Use Extender Bars: This determines whether "extender bars" should be used on newly created gates. In older versions of tkgate, the inputs on simple gates such AND and OR were squeezed into a fixed space irregardless of how many inputs their were. Newer versions of tkgate can use extender bars on many-input AND, OR and XOR gates. You can use this option to control the style to be used on newly created gates. Extisting gates are unaffected and a circuit can contain a mix of old-style and new-style gates.

### 2.16 Gate Types

Name | Keywords(s) | Shortcut(s) | Symbol | Description
--- | --- | --- | --- | ---
AND | and, nand |
a
A
|  | Outputs the logical AND of the input signals. All of the inputs must be have either the same bit width as the output, or be single bit. In the case of a gate with mixed multi- and single-bit inputs, the single-bit inputs are assumed to be connected to across all bits of the multi-bit signals.
OR | or, nor |
o
O
|  | Outputs the logical OR of the input signals. All of the inputs must be have either the same bit width as the output, or be single bit. In the case of a gate with mixed multi- and single-bit inputs, the single-bit inputs are replicated to all of the other bits.
XOR | xor, xnor |
x
X
|  | Outputs the logical XOR of the input signals. All of the inputs must be have either the same bit width as the output, or be single bit. In the case of a gate with mixed multi- and single-bit inputs, the single-bit inputs are replicated to all of the other bits.
Buffer | buf, not |
b
I
|  | Buffers the input signal. If the input signal is a value other than logic-1 or logic-0 (e.g., floating) the output will be the unknown signal. The inputs and outputs must have the same bit width.
Tri-State Buffer | bufif1, bufif0, notif1,notif0 |
t
|  | Outputs a buffered signal when the enable line (top) is logic-1. Note that an inverter placed on the output of a tri-state buffer is not equivalent to connecting the output to a separate inverter element. With an inverted output, a logic-0 on the enable line will result in floating output (i.e., Verilog notif behavior). The input and output must have the same bit width, and the enable line must be single bit.
Reduction Gates | and, nand, or, nor, xor, xnor |
Ctl-r a | Ctl-r A
Ctl-r o | Ctl-r O
Ctl-r x | Ctl-r X
|  | Outputs the logical AND of all of the bits on the input. Reduction gates for OR and XOR are also available. The output must be single-bit.
Constants | supply1, supply0 |
g | v
|  | Outputs a logic-1 or logic-0. There are no bit-width restrictions.
Switch | switch |
s
|  | Outputs a single-bit logic value according to the switch setting. Clicking on a switch while in simulation mode will toggle its state. The output must be single-bit.
Dip Switch | dip |
d
|  | Outputs a multi-bit signal according to the switch setting. Clicking on a dip switch while in simulation mode will enable a hex value for the switch to be entered.
Tty | tty |
d
|  | Tty gates can be used to model an interactive terminal. Your circuit can send characters to be displayed on the tty, or receive characters that were typed in the tty. See the section on ttys in the simulator manual for details on how to use ttys.
Clock | clock |
c
|  | Outputs a clock signal with a specified pulsewidth (f), phase (p), and duty width(dw). The output must be single bit.
Wire Merge | concat |
w
|  | Combines multiple wires into a single multi-bit wire. The sum of the bits on the left side must add up to the bit width of the right side. The current implementation has a limitation that all signals must flow in the same direction. That is, you must put all of the driving gates on either the left or right.
Wire Tap | n/a |
n/a
|  | Pulls off a sub-range of a multi-bit wire. This gate type is not created through the menus like most other gates, but by dropping the end of a wire on a wire of a larger bit-width. You can use the "Properties..." option from the "Gate" menu to select the bit range to be extracted. This gate can only be used to "read" the value of a wire, and cannot be used to "wire" a value on a multi-bit bus.
Adder | add |
+
|  | Outputs the sum of the inputs. The inputs must have the same bit width as the output, and the carry-in and -out must be single bit. The carry-in line is indicated by the dot.
Divider | div |
/
|  | Outputs the quotient and remainder of the inputs. The left input is the dividend, and the right input is the divisor. There are no bit-width restrictions, but if the result does not fit in the supplied bitwidth, it may be truncated.
Multiplier | mult |
*
|  | Outputs the product of the inputs. There are no bit-width restrictions, but if the result does not fit in the supplied bitwidth, it may be truncated.
Multiplexor | mux |
m
|  | Outputs the input selected by the select line. The bit-width of the inputs must match the bit-width of the output, and the bit-width of the select line must be the ceiling of the base-2 log of the number of input lines.
Decoder | demux |
D 2
|  | Outputs the input selected by the select line. The bit-width of the inputs must match the bit-width of the output, and the bit-width of the select line must be the ceiling of the base-2 log of the number of input lines.
Left Shift | lshift |
S L
|  | Performs a logical shift-left of the input. The input and output must have the same bit width, and the bit-width of the shift select line must be the ceiling of the base-2 log of the input/output bitwidth.
Right Shift | rshift |
S R
|  | Performs a logical shift-right of the input. The input and output must have the same bit width, and the bit-width of the shift select line must be the ceiling of the base-2 log of the input/output bitwidth.
Arithmetic Shift | arshift |
S A
|  | Performs an arithmetic shift-right of the input. The input and output must have the same bit width, and the bit-width of the shift select line must be the ceiling of the base-2 log of the input/output bitwidth.
Roll | roll |
S O
|  | Rolls the input bits to the left. The input and output must have the same bit width, and the bit-width of the shift select line must be the ceiling of the base-2 log of the input/output bitwidth.
Register | register |
r
|  | Outputs the current value of the register, and stores the input value on a positive edge on the clock line. The data value is only loaded when the active-low enable (EN) line is asserted. The register can be cleared asynchronously with the active-low clear (CL) line. The input and output must have the same bit width, and the clock, EN and CL lines must be single-bit.
Flip-Flop | ff |
f
|  | Outputs the current value and inverted value of the flip-flop, and stores the input value on a positive edge on the clock line. The data value is only loaded when the active-low enable (E) line is asserted. The flip-flop can be cleared asynchronously with the active-low clear (C) line. The input and output must have the same bit width, and the clock, E and C lines must be single-bit.
RAM | ram |
R
|  | When the chip-select line (CS) and output enable (OE) lines are low, the memory value addressed by the address line (A) is output to the data line (D). When the chip select line and the write enable line (WE) are low, the value present on the data line is stored in the memory at the address specified by the address line. The control lines, CS, OE, WE must be single-bit. The address and data lines must be no more than 32 bits. RAMs can be initialized from a file at simulation time.
ROM | rom |
u
|  | When the output enable line (OE) is low, the memory value addressed by the address line (A) is output to the data line (D). The output enable line must be single bit, and the address and data lines must be no more than 32 bits. ROMs can be initialized from a file at simulation time.
NMOS Trans. | nmos |
Ctl-t n
|  | Implements a Verilog-style NMOS element. All signals must have the same bit width. NMOS elements with multi-bit inputs and outputs are treated as parallel transistors.
PMOS Trans. | pmos |
Ctl-t p
|  | Implements a Verilog-style PMOS element. All signals must have the same bit width. PMOS elements with multi-bit inputs and outputs are treated as parallel transistors.
LED | led |
l | L 8
L s | L h
L d
|  | LED Indicator elements which can display the values of signals in your circuit. The different types of LED are indicated by a property flag of the basic LED circuit element. The types from upper left are: bit, bar graph, direct, hexidecimal and decimal. The number of digits or bars is automatically determined from the size of the input wire. For the three types of 7-segment LEDs, the interpretation of the input data depends on the type. For direct LEDs, each 7-bits of the input dignal directly control one segment of the LED numbered from top-to-bottom, left-to-right. For hexidecimal LEDs, each four bit group controls one digit. For decimal LEDs, the value of the input signal is displayed as an unsigned decimal value.
Module | name |
M
|  | Implements a user-defined module. An arbitrary number of inputs, outputs and inout ports can be used with no restrictions on bit width. The name of the module is used in the save file and cannot be the same as any of the built-in gates.
Comment | comment |
C
|  | Comments can be used to place embed text into a circuit diagram. Comments have no effect on the behaviour of circuits.
Frame | frame |
F
|  | Frames can be used to create visual segmentation of a circuit diagram. Frames have no effect on the behaviour of circuits.

### 2.17 Menu Summary

Menu Option | Shortcut | Description
--- | --- | ---
File | New | Ctl-x k | Flushes the current circuit and begins a new one. A dialog box will prompt for a new circuit file and top-level block name.
Open... | Ctl-x Ctl-f | Flushes the current circuit and reads a new circuit from a file.
Open Library... | Ctl-x Ctl-l | Reads library modules from a file. The modules will be marked as library modules. Only modules that to not supersede a current non-library module will be loaded.
Save | Ctl-x Ctl-s | Saves the current circuit to the current file. If there is no current file, TkGate will prompt for a file name.
Save... | Ctl-x Ctl-w | Prompts for a file name and saves the circuit. The specified file name will become the new current file.
Print... | Ctl-x Ctl-p | Prints a schematic diagram. Schematics can be printed directly to the printer or to a file.
Options... | Ctl-x o | Brings up a dialog box allowing TkGate options to be set.
Quit | Ctl-x Ctl-c | Exits TkGate.
Edit | Cut | Ctl-w | Cuts the selected gates and inserts them into the cut buffer.
Copy | Ctl-x x | Copies the selected gates into the cut buffer.
Paste | Ctl-y | Pastes the contents of the cut buffer. If a mark is set, the gates will be pasted at the mark postion. If no mark is set, the original position of the gates in the cut buffer will be used.
Select All | Ctl-x a | Selects all gates.
Find... | Ctl-f | Searches for a gate or wire containing a substring.
Align Vert. | | | Positions the selected gates such that they are vertically aligned.
Align Horz. | - | Positions the selected gates such that they are horizontally aligned.
Tool | Move/Connect | F1 | Enables move/connect mode.
Delete Gate | F2 | Enables delete gate mode.
Cut Wire | F3 | Enables cut wire mode.
Invert | F4 | Enables invert port mode.
Bit Width | F5 | Enables set bit width mode.
Rot 0 | Ctl-F1 | Sets rotation for new gates to 0.
Rot 90 | Ctl-F2 | Sets rotation for new gates to 90.
Rot 180 | Ctl-F3 | Sets rotation for new gates to 180.
Rot 270 | Ctl-F4 | Sets rotation for new gates to 270.
Circuit | Circuit Properties... | Ctl-x E | Sets global properties of a circuit.
Criticl Path... | Ctl-x r | List the critical paths of a circuit.
Simulate | Begin Simulation | Ctl-s b | Starts a simulation.
Run | Ctl-s g | Puts the simulator into continuous simulation mode.
Pause | Ctl-s s | Puts the simulator into single-step mode.
Step Epoch(s) | space | Steps the simulator a fixed number of epochs. The step size can be set in the TkGate options box.
Step Cycle | tab | Steps the simulator a fixed number of clock cycles plus a fixed number of epochs. The number of cycles and the overstep can be set in the TkGate options box.
Breakpoint... | Ctl-s k | Creates a condition which will cause the simulator to transition from continuous simulation mode to single step mode.
Exec. Script... | Ctl-s x | Reads simulation commands from a script file.
Load Memory... | Ctl-s l | Loads a memory(ies) from a file.
Dump Memory... | Ctl-s d | Dumps a memory to a file.
Module | Open | > | Opens the currently selected module instance.
Close | < | Closes the current module and makes the next module up on the module stack the current module. Also exits from "module interface" mode.
Set Interface | Ctl-b s | Makes the interface of the currently selected module instance the default module interface.
Edit Interfaces... | Ctl-b e | Enters a mode allowing module interfaces for all module types to be edited.
New... | Ctl-b n | Creates a new module definition.
Delete... | Ctl-b d | Deletes a module definition.
Copy... | Ctl-b c | Copies a module definition to another module.
Rename... | Ctl-b r | Renames a module defintion.
Claim... | Ctl-b l | Convert a library module to a user module.
Gate | Add Input | [ | Adds an input to the currently selected gate. If the gate is a module instance, a special cursor will appear and you can select the position for the port.
Add Output | ] | Adds an output to the currently selected gate. If the gate is a module instance, a special cursor will appear and you can select the position for the port.
Add Bidir | - | Adds an inout to the currently selected gate. If the gate is a module instance, a special cursor will appear and you can select the position for the port.
Change Type | @ | Changes the type (input, output or inout) of a port on a module instance.
Anchor Selected | Ctl-x f | Sets the anchor bit of all selected gates. Anchored gates can not be moved with the mouse.
Unanchor Selected | Ctl-x u | Unsets the anchor bit of all selected gates.
Properties... | E | Edit properties of the selected gate.
Replicate | Ctl-v | Make multiple replicas of a gate.
Delete | del | Delete the selected gate(s).
Make | I/O | Switch | s | Make a switch.
Dip Switch | d | Make a dip switch.
Ground | g | Make a constant logic 0 element.
Vdd | v | Make a constant logic 1 element.
Wire Merge | w | Make a wire merge element.
LED | l | Single bit LED
LED Bar | l[n] | LED Bar Graph
7-Seg. LED (HEX) | Lh | 7-Segment LED with hexidecimal encoding
7-Seg. LED (DEC) | Ld | 7-Segment LED with decimal encoding.
7-Seg. LED (Direct) | Ls | 7-Segment LED with direct encoding.
Clock | c | Make a clock.
Tty | T | Make a tty.
Gate | AND | a | Make a AND gate.
NAND | A | Make a NAND gate.
OR | o | Make an OR gate.
NOR | O | Make a NOR gate.
XOR | x | Make an XOR gate.
XNOR | X | Make an XNOR gate.
Buffer | b | Make a buffer.
Inverter | i | Make an inverter.
Tri-Buffer | t | Make a tri-state buffer.
NMOS | Ctl-t n | Make a NMOS transistor.
PMOS | Ctl-t p | Make a PMOS transistor.
Reduction | AND | Ctl-r a | Make a reduction AND gate.
NAND | Ctl-r A | Make a reduction NAND gate.
OR | Ctl-r o | Make a reduction OR gate.
NOR | Ctl-r O | Make a reduction NOR gate.
XOR | Ctl-r x | Make a reduction XOR gate.
XNOR | Ctl-r X | Make a reduction XNOR gate.
MSI | 2-1 Multiplexor | m | Make a 2-1 multiplexor.
4-1 Multiplexor | M 4 | Make a 4-1 multiplexor.
8-1 Multiplexor | M 8 | Make an 8-1 multiplexor.
1-2 Decoder | D 2 | Make a 1-2 decoder.
1-4 Decoder | D 4 | Make a 1-4 decoder.
1-8 Decoder | D 8 | Make a 1-8 decoder.
ALU | Adder | + | Make an adder.
Multiplier | * | Make a multiplier.
Divider | / | Make a divider.
Left Shift | S L | Make a left shifter.
Right Shift | S R | Make a right shifter.
Arith. Right Shift | S A | Make an arithmetic right shifter.
Roll | S O | Make a roll shifter.
Memory | Register | r | Make a register.
RAM | R | Make a random access memory.
ROM | u | Make a read-only memory.
Module | Module Instance | B | Make a module instance.
Module Input | } | Make a module input port.
Module Output | { | Make a module output port.
Module InOut | = | Make a module inout port.
Comment | C | Make a comment.
Frame | F | Make a frame box.

### 2.18 Edit-Mode Toolbar Summary

| Discard the existing circuit and prompt for a new file name.
| Discard the existing circuit and prompt for a file from which to load a new circuit.
| Save the current file.
| Print the current file.
| Use the move/connect tool.
| Use the delete gate tool.
| Use the wire cutters tool.
| Use the invert port tool.
| Use the wire sizing tool.
| Undo the previous action and place it on the undone list.
| Redo the top action on the undone list.
| Open the currently selected module instance.
| Closes the current module and makes the next module up on the module stack the current module. Also exits from "module interface" mode.
| Zoom in.
| Zoom out.
| Bring up the logic analyzer and start a circuit simulation.
| Do a critical path analysis of the current circuit.

Last edit by hansen on Wed Dec 17 14:10:53 2003