B44UDIAG is a DOS based program that runs a series of diagnostic tests on the Broadcom 440X 10/100 Integrated Controller. If any test fails, the B44UDIAG program displays an error and exits to DOS.
The following options are available:
Option | Operation | |
---|---|---|
-l file |
Logs the data to a file. |
|
-c num |
Specifies the card to be tested. |
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-I num |
Iteration number. |
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-t id |
Disables tests. |
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-T id |
Enables tests. |
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-r num |
Input radix. |
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-lbm number of packets |
Option to specify the number of packets in the MAC loopback test. |
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-lbp number of packets |
Option to specify the number of packets in the PHY loopback test. |
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-lbh number of packets |
Option to specify the number of packets in the 100BASE-T external loopback test. |
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-lbt number of packets |
Option to specify the number of packets in the 10BASE-T external loopback test. |
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-elog file |
Produces a log file with only error information. |
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-com value |
Enables com port (Value 1..4) (internal use only). | |
-ppxe |
Programs PXE from file. | |
-x |
Searches devices based on vendor ID only. | |
-info |
Option to display Dev ID, Ven ID, Sven ID, SSystem ID. | |
|
Force to accept full length MAC address. |
To run B44UDIAG
Create a MS-DOS 6.22 bootable floppy disk containing the B44UDIAG.EXE file. Next, start the computer with the boot disk in the floppy disk drive. At the MS-DOS prompt, type b44udiag -options, as shown in the following example.
Example
A:\ b44udiag -l test.log -c 1 -I 2 -t A3 -lbm 3000 -lbp 3000 -lbh 3000 -lbt 3000
Operating System: MS-DOS 6.22
Software: B44UDIAG.EXE
The diagnostic tests are divided into 3 groups: Register Tests, Miscellaneous Tests, and Data Tests. They are designated Group A, Group B, and Group C, respectively.
Name | Function |
---|---|
Group A: Register Tests | |
A1. Indirect Control Register Test | By using an indirect addressing method, the test writes 0s and 1s to the test bits to ensure that the read-only bits are not changed and that the read/write bits are changed. |
A2. Control Register Test | The test writes 0s and 1s to the test bits to ensure that the read-only bits are not changed and that the read/write bits are changed. |
A3. Interrupt Test | Verifies the interrupt functionality by enabling interrupt and waiting for interrupts to occur. It waits for 500 ms and reports an error if it cannot generate interrupts. |
A4. Built-In Self-Test | Runs the built-in self-test. |
A5. CAM Test | This test runs the content addressable memory (CAM) read/write test. There are 48-bit patterns written to 64 entries of CAM space. The test reads back the 64 entries and checks them against 6 patterns such as FFFF, 0000, 5555, AAAA, 55AA, AA55. |
Group B: Miscellaneous Tests | |
B1. LED Test | This test forces the link state for each link speed/duplex. |
B2. EEPROM Test | This test reads the serial EEPROM and verifies its integrity by performing a cyclic redundancy check (CRC). |
B3. MII Test | The test writes 0s and 1s to the test bits to ensure that the read-only bits value are not changed and that the read/write bits are changed. |
B4. Link Status Test | This test reports the current link status. |
Group C: Data Tests | |
C1. MAC Loopback Test | This test transmits a 128-byte packet with the incrementing data pattern and checks the TX and RX flags and data integrity. |
C2. PHY Loopback Test | This test is the same as the MAC Loopback Test, except that the data is routed back through a physical layer device. |
C5. PHY Loopback with CAM Enabled Test | This test is the same as the PHY Loopback Test with CAM matching enabled. |
C8. MIB MAC Loopback Test | This test tests each bit in the MIB counters and ensures that the MIB counter bits are incremented when MAC looping a packet. |