Makefile

makefile 是由 make 命令引用的文本文件,它描述目标的构建,并包含诸如源代码级别相关性和构建顺序相关性之类的信息。

CDT 可以为您生成 makefile,这样的项目被称为“受管 Make”项目。某些项目(称为“标准 Make”项目)允许您定义自己的 makefile。

样本 Makefile

# A sample Makefile
# This Makefile demonstrates and explains
# Make Macros, Macro Expansions,
# Rules, Targets, Dependencies, Commands, Goals
# Artificial Targets, Pattern Rule, Dependency Rule.

# Comments start with a # and go to the end of the line.

# Here is a simple Make Macro.
LINK_TARGET = test_me.exe

# Here is a Make Macro that uses the backslash to extend to multiple lines.
# This allows quick modification of more object files.
OBJS =  \
 Test1.o \
 Test2.o \
 Main.o

# Here is a Make Macro defined by two Macro Expansions.
# A Macro Expansion may be treated as a textual replacement of the Make Macro.
# Macro Expansions are introduced with $ and enclosed in (parentheses).
REBUILDABLES = $(OBJS) $(LINK_TARGET)

# Make Macros do not need to be defined before their Macro Expansions,
# but they normally should be defined before they appear in any Rules.
# Consequently Make Macros often appear first in a Makefile.

# Here is a simple Rule (used for "cleaning" your build environment).
# It has a Target named "clean" (left of the colon ":" on the first line),
# no Dependencies (right of the colon),
# and two Commands (indented by tabs on the lines that follow).
# The space before the colon is not required but added here for clarity.
clean :
 rm -f $(REBUILDABLES)
 echo Clean done

# There are two standard Targets your Makefile should probably have:
# "all" and "clean", because they are often command-line Goals.
# Also, these are both typically Artificial Targets, because they don't typically
# correspond to real files named "all" or "clean".

# The rule for "all" is used to incrementally build your system.
# It does this by expressing a dependency on the results of that system,
# which in turn have their own rules and dependencies.
all : $(LINK_TARGET)
 echo All done

# There is no required order to the list of rules as they appear in the Makefile.
# Make will build its own dependency tree and only execute each rule only once
# its dependencies' rules have been executed successfully.

# Here is a Rule that uses some built-in Make Macros in its command:
# $@ expands to the rule's target, in this case "test_me.exe".
# $^ expands to the rule's dependencies, in this case the three files
# main.o, test1.o, and  test2.o.
$(LINK_TARGET) : $(OBJS)
 g++ -g -o $@ $^

# Here is a Pattern Rule, often used for compile-line.
# It says how to create a file with a .o suffix, given a file with a .cpp suffix.
# The rule's command uses some built-in Make Macros:
# $@ for the pattern-matched target
# $lt; for the pattern-matched dependency
%.o : %.cpp
 g++ -g -o $@ -c $<

# These are Dependency Rules, which are rules without any command.
# Dependency Rules indicate that if any file to the right of the colon changes,
# the target to the left of the colon should be considered out-of-date.
# The commands for making an out-of-date target up-to-date may be found elsewhere
# (in this case, by the Pattern Rule above).
# Dependency Rules are often used to capture header file dependencies.
Main.o : Main.h Test1.h Test2.h
Test1.o : Test1.h Test2.h
Test2.o : Test2.h

# Alternatively to manually capturing dependencies, several automated
# dependency generators exist.  Here is one possibility (commented out)...
# %.dep : %.cpp
#        g++ -M $(FLAGS) $< > $@
# include $(OBJS:.o=.dep)

常见问题:

“控制台”视图对于调试构建来说非常有用。

问题 1. 我的“控制台”视图显示 "Error launching builder"。这有何含义?

Error launching builder (make -k clean all )
(Exec error:Launching failed)

最有可能的情况是,构建命令(缺省情况下是“make”)不在您的路径上。可以将它放到您的路径上并重新启动 Eclipse。
也可以将构建命令更改为位于路径上的内容。如果正在使用 MinGW 工具来进行编译,则应该将构建命令替换为“mingw32-make”。

问题 2. 我的“控制台”视图显示 "No rule to make target 'X'"

make -k clean all
make: *** No rule to make target 'clean'.
make: *** No rule to make target 'all'.

缺省情况下,make 程序查找通常名为“Makefile”或“makefile”的文件。如果在工作目录中找不到这样的文件,或者如果该文件是空的或该文件不包含命令行目标(在此示例中,是“clean”和“all”)的规则,则它通常会失败,并发出类似于所显示的那些错误消息。

如果已具有有效的 Makefile,则可能需要更改构建的工作目录。构建命令的缺省工作目录是项目的根目录。可以通过在“Make 项目”属性中指定备用构建目录来更改此缺省工作目录。或者,如果 Makefile 具有其它名称(例如 buildFile.mk),则可以通过将缺省构建命令设置为 make -f buildFile.mk 来指定该名称。

如果没有有效的 Makefile,请在根目录中创建名为 Makefile 的新文件。然后,可以添加样本 Makefile 的内容(如上所示)并进行适当的修改。

问题 3. 我的“控制台”视图显示 "missing separator"

make -k clean all
makefile:12: *** missing separator.  Stop.

Makefile 的标准语法规定构建规则中的每一行的前面都必须要有跳进字符。这个跳进字符经常会被意外地替换为空格,由于这两者都会导致空格缩进,所以此问题很容易被忽略。在所提供的样本中,错误消息可能指的是文件“makefile”的第 12 行;要修正该问题,请在该行的开头插入跳进字符。

问题 4. 我的“控制台”视图显示 "Target 'all' not remade because of errors"

make -k clean all
make: *** [clean] Error 255
rm -f Test1.o Test2.o Main.o test_me.exe
g++ -g -o Test1.o -c Test1.cpp
make: *** [Test1.o] Error 255
make: *** [Test2.o] Error 255
make: *** [Main.o] Error 255
g++ -g -o Test2.o -c Test2.cpp
g++ -g -o Main.o -c Main.cpp
make: Target 'all' not remade because of errors.

此处最有可能的故障原因是 g++ 不在路径中。

错误 255 是由 make 生成的,原因是 make 的命令 shell 找不到用于特定规则的命令。
在“控制台”视图中的此位置,来自标准错误流的消息(显示错误 255 的行)和来自标准输出流的消息(所有其它行)被合并到一起。

问题 5. -k 标志有何含义?

-k 标志告诉 make 即使一个规则失败也要继续建立其它独立的规则。这有助于构建大型项目。

可以通过打开“项目属性”>“C/C++ Make 项目”>“Make 构建器”>“在第一次发生构建错误时停止”来除去 -k 标志。

问题 6. 我的“控制台”视图显示如下:

mingw32-make clean all
process_begin: CreateProcess((null), rm -f Test1.o Test2.o Main.o test_me.exe, ...) failed.
make (e=2): The system cannot find the file specified.

mingw32-make: *** [clean] Error 2
rm -f Test1.o Test2.o Main.o test_me.exe

这表示 mingw32-make 找不到实用程序“rm”。不幸的是,MinGW 没有附带“rm”。要更正此问题,请将 Makefile 中的 clean 规则替换为:

clean :
	-del $(REBUILDABLES)
	echo Clean done

前导减号告诉 make 即使 del 命令返回失败也要将 clean 规则看作是成功的。因为当指定要删除的文件尚不存在(或者再也不会存在)时 del 命令将失败,所以这样做可能是可接受的。

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