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Orc Reference Manual | ![]() |
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enum OrcSSERegister; enum OrcTargetSSEFlags; #define ORC_SSE_SHUF (a, b, c, d) #define orc_sse_emit_pshufd (p, imm, a, b) #define orc_sse_emit_pshuflw (p, imm, a, b) unsigned int orc_sse_get_cpu_flags (void
); void orc_sse_init (void
);
typedef enum { X86_XMM0 = ORC_VEC_REG_BASE + 16, X86_XMM1, X86_XMM2, X86_XMM3, X86_XMM4, X86_XMM5, X86_XMM6, X86_XMM7, X86_XMM8, X86_XMM9, X86_XMM10, X86_XMM11, X86_XMM12, X86_XMM13, X86_XMM14, X86_XMM15 }OrcSSERegister;
typedef enum { ORC_TARGET_SSE_SSE2 = (1<<0), ORC_TARGET_SSE_SSE3 = (1<<1), ORC_TARGET_SSE_SSSE3 = (1<<2), ORC_TARGET_SSE_SSE4_1 = (1<<3), ORC_TARGET_SSE_SSE4_2 = (1<<4), ORC_TARGET_SSE_SSE4A = (1<<5), ORC_TARGET_SSE_SSE5 = (1<<6), ORC_TARGET_SSE_FRAME_POINTER = (1<<7), ORC_TARGET_SSE_SHORT_JUMPS = (1<<8), ORC_TARGET_SSE_64BIT = (1<<9) }OrcTargetSSEFlags;
#define orc_sse_emit_pshufd(p,imm,a,b) orc_x86_emit_cpuinsn_imm(p, ORC_X86_pshufd, imm, a, b)
#define orc_sse_emit_pshuflw(p,imm,a,b) orc_x86_emit_cpuinsn_imm(p, ORC_X86_pshuflw, imm, a, b)