SAM3N DACC
Digital-to-Analog Converter Controller (DACC) User Interface
Registers
Address | Register | Name | Access | Reset |
---|---|---|---|---|
0x4003C000 | Control Register | DACC_CR | write-only | - |
0x4003C004 | Mode Register | DACC_MR | read-write | 0x00000000 |
0x4003C008 | Conversion Data Register | DACC_CDR | write-only | 0x00000000 |
0x4003C00C | Interrupt Enable Register | DACC_IER | write-only | - |
0x4003C010 | Interrupt Disable Register | DACC_IDR | write-only | - |
0x4003C014 | Interrupt Mask Register | DACC_IMR | read-only | 0x00000000 |
0x4003C018 | Interrupt Status Register | DACC_ISR | read-only | 0x00000000 |
0x4003C0E4 | Write Protect Mode Register | DACC_WPMR | read-write | 0x00000000 |
0x4003C0E8 | Write Protect Status Register | DACC_WPSR | read-only | 0x00000000 |
0x4003C108 | Transmit Pointer Register | DACC_TPR | read-write | 0x00000000 |
0x4003C10C | Transmit Counter Register | DACC_TCR | read-write | 0x00000000 |
0x4003C118 | Transmit Next Pointer Register | DACC_TNPR | read-write | 0x00000000 |
0x4003C11C | Transmit Next Counter Register | DACC_TNCR | read-write | 0x00000000 |
0x4003C120 | Transfer Control Register | DACC_PTCR | write-only | 0x00000000 |
0x4003C124 | Transfer Status Register | DACC_PTSR | read-only | 0x00000000 |
Register Fields
DACC Control Register
Name: DACC_CR
Access: write-only
Address: 0x4003C000
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | - | SWRST |
- SWRST: Software Reset
Value Name Description 0 - No effect. 1 - Resets the DACC simulating a hardware reset.
DACC Mode Register
Name: DACC_MR
Access: read-write
Address: 0x4003C004
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
CLKDIV | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
CLKDIV | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
STARTUP | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | WORD | DACEN | TRGSEL | TRGEN |
- TRGEN: Trigger Enable
Value Name Description 0 - External trigger mode disabled. DACC in free running mode. 1 - External trigger mode enabled. - TRGSEL: Trigger Selection
Value Name Description 0x0 TRGSEL0 External trigger 0x1 TRGSEL1 TIO Output of the Timer Counter Channel 0 0x2 TRGSEL2 TIO Output of the Timer Counter Channel 1 0x3 TRGSEL3 TIO Output of the Timer Counter Channel 2 - DACEN: DAC enable
Value Name Description 0 - DAC disabled. 1 - DAC enabled. - WORD: Word Transfer
Value Name Description 0 - Half-Word transfer 1 - Word Transfer - STARTUP: Startup Time Selection
- CLKDIV: DAC Clock Divider for Internal Trigger
-
-
DACC Conversion Data Register
Name: DACC_CDR
Access: write-only
Address: 0x4003C008
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
DATA | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
DATA | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
DATA | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DATA |
- DATA: Data to Convert
-
DACC Interrupt Enable Register
Name: DACC_IER
Access: write-only
Address: 0x4003C00C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | TXBUFE | ENDTX | TXRDY |
- TXRDY: Transmission Ready Interrupt Enable
- ENDTX: End of PDC Interrupt Enable
- TXBUFE: Buffer Empty Interrupt Enable
-
-
-
DACC Interrupt Disable Register
Name: DACC_IDR
Access: write-only
Address: 0x4003C010
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | TXBUFE | ENDTX | TXRDY |
- TXRDY: Transmission Ready Interrupt Disable
- ENDTX: End of PDC Interrupt Disable
- TXBUFE: Buffer Empty Interrupt Disable
-
-
-
DACC Interrupt Mask Register
Name: DACC_IMR
Access: read-only
Address: 0x4003C014
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | TXBUFE | ENDTX | TXRDY |
- TXRDY: Transmission Ready Interrupt Mask
- ENDTX: End of PDC Interrupt Mask
- TXBUFE: Buffer Empty Interrupt Mask
-
-
-
DACC Interrupt Status Register
Name: DACC_ISR
Access: read-only
Address: 0x4003C018
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | - |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | TXBUFE | ENDTX | TXRDY |
- TXRDY: Transmission Ready Interrupt Flag
- ENDTX: End of PDC Interrupt Flag
- TXBUFE: Buffer Empty Interrupt Flag
-
-
-
DACC Write Protect Mode Register
Name: DACC_WPMR
Access: read-write
Address: 0x4003C0E4
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
WPKEY | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
WPKEY | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
WPKEY | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | - | WPEN |
- WPEN: Write Protect Enable
Value Name Description 0 - Disables the Write Protect if WPKEY corresponds to 0x444143 ("DAC" in ASCII). 1 - Enables the Write Protect if WPKEY corresponds to 0x444143 ("DAC" in ASCII). - WPKEY: Write Protect KEY
-
DACC Write Protect Status Register
Name: DACC_WPSR
Access: read-only
Address: 0x4003C0E8
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
WPROTADDR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | - | WPROTERR |
- WPROTERR: Write protection error
- WPROTADDR: Write protection error address
-
-
DACC Transmit Pointer Register
Name: DACC_TPR
Access: read-write
Address: 0x4003C108
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
TXPTR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
TXPTR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TXPTR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TXPTR |
- TXPTR: Transmit Counter Register
-
DACC Transmit Counter Register
Name: DACC_TCR
Access: read-write
Address: 0x4003C10C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TXCTR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TXCTR |
- TXCTR: Transmit Counter Register
-
DACC Transmit Next Pointer Register
Name: DACC_TNPR
Access: read-write
Address: 0x4003C118
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
TXNPTR | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
TXNPTR | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TXNPTR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TXNPTR |
- TXNPTR: Transmit Next Pointer
-
DACC Transmit Next Counter Register
Name: DACC_TNCR
Access: read-write
Address: 0x4003C11C
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
TXNCTR | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
TXNCTR |
- TXNCTR: Transmit Counter Next
-
DACC Transfer Control Register
Name: DACC_PTCR
Access: write-only
Address: 0x4003C120
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | TXTDIS | TXTEN |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | RXTDIS | RXTEN |
- RXTEN: Receiver Transfer Enable
Value Name Description 0 - No effect. 1 - Enables PDC receiver channel requests if RXTDIS is not set. - RXTDIS: Receiver Transfer Disable
Value Name Description 0 - No effect. 1 - Disables the PDC receiver channel requests. - TXTEN: Transmitter Transfer Enable
Value Name Description 0 - No effect. 1 - Enables the PDC transmitter channel requests. - TXTDIS: Transmitter Transfer Disable
Value Name Description 0 - No effect. 1 - Disables the PDC transmitter channel requests.
DACC Transfer Status Register
Name: DACC_PTSR
Access: read-only
Address: 0x4003C124
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
- | - | - | - | - | - | - | - |
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
- | - | - | - | - | - | - | - |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
- | - | - | - | - | - | - | TXTEN |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
- | - | - | - | - | - | - | RXTEN |
- RXTEN: Receiver Transfer Enable
Value Name Description 0 - PDC Receiver channel requests are disabled. 1 - PDC Receiver channel requests are enabled. - TXTEN: Transmitter Transfer Enable
Value Name Description 0 - PDC Transmitter channel requests are disabled. 1 - PDC Transmitter channel requests are enabled.