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power.h
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1 /* Copyright (c) 2006, 2007, 2008 Eric B. Weddington
2 All rights reserved.
3
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions are met:
6
7 * Redistributions of source code must retain the above copyright
8 notice, this list of conditions and the following disclaimer.
9 * Redistributions in binary form must reproduce the above copyright
10 notice, this list of conditions and the following disclaimer in
11 the documentation and/or other materials provided with the
12 distribution.
13 * Neither the name of the copyright holders nor the names of
14 contributors may be used to endorse or promote products derived
15 from this software without specific prior written permission.
16
17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 POSSIBILITY OF SUCH DAMAGE. */
28
29 /* $Id: power.h 2254 2011-09-26 15:06:50Z arcanum $ */
30
31 #ifndef _AVR_POWER_H_
32 #define _AVR_POWER_H_ 1
33
34 #include <avr/io.h>
35 #include <stdint.h>
36
37
38 /** \file */
39 /** \defgroup avr_power <avr/power.h>: Power Reduction Management
40
41 \code #include <avr/power.h>\endcode
42
43 Many AVRs contain a Power Reduction Register (PRR) or Registers (PRRx) that
44 allow you to reduce power consumption by disabling or enabling various on-board
45 peripherals as needed.
46
47 There are many macros in this header file that provide an easy interface
48 to enable or disable on-board peripherals to reduce power. See the table below.
49
50 \note Not all AVR devices have a Power Reduction Register (for example
51 the ATmega128). On those devices without a Power Reduction Register, these
52 macros are not available.
53
54 \note Not all AVR devices contain the same peripherals (for example, the LCD
55 interface), or they will be named differently (for example, USART and
56 USART0). Please consult your device's datasheet, or the header file, to
57 find out which macros are applicable to your device.
58
59 */
60
61
62 /** \addtogroup avr_power
63
64 \anchor avr_powermacros
65 <small>
66 <center>
67 <table border="3">
68 <tr>
69 <td width="10%"><strong>Power Macro</strong></td>
70 <td width="15%"><strong>Description</strong></td>
71 <td width="75%"><strong>Applicable for device</strong></td>
72 </tr>
73
74 <tr>
75 <td>power_adc_enable()</td>
76 <td>Enable the Analog to Digital Converter module.</td>
77 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
78 </tr>
79
80 <tr>
81 <td>power_adc_disable()</td>
82 <td>Disable the Analog to Digital Converter module.</td>
83 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
84 </tr>
85
86 <tr>
87 <td>power_lcd_enable()</td>
88 <td>Enable the LCD module.</td>
89 <td>ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490</td>
90 </tr>
91
92 <tr>
93 <td>power_lcd_disable().</td>
94 <td>Disable the LCD module.</td>
95 <td>ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490</td>
96 </tr>
97
98 <tr>
99 <td>power_pscr_enable()</td>
100 <td>Enable the Reduced Power Stage Controller module.</td>
101 <td>AT90PWM81</td>
102 </tr>
103
104 <tr>
105 <td>power_pscr_disable()</td>
106 <td>Disable the Reduced Power Stage Controller module.</td>
107 <td>AT90PWM81</td>
108 </tr>
109
110 <tr>
111 <td>power_psc0_enable()</td>
112 <td>Enable the Power Stage Controller 0 module.</td>
113 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
114 </tr>
115
116 <tr>
117 <td>power_psc0_disable()</td>
118 <td>Disable the Power Stage Controller 0 module.</td>
119 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
120 </tr>
121
122 <tr>
123 <td>power_psc1_enable()</td>
124 <td>Enable the Power Stage Controller 1 module.</td>
125 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
126 </tr>
127
128 <tr>
129 <td>power_psc1_disable()</td>
130 <td>Disable the Power Stage Controller 1 module.</td>
131 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
132 </tr>
133
134 <tr>
135 <td>power_psc2_enable()</td>
136 <td>Enable the Power Stage Controller 2 module.</td>
137 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM81</td>
138 </tr>
139
140 <tr>
141 <td>power_psc2_disable()</td>
142 <td>Disable the Power Stage Controller 2 module.</td>
143 <td>AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM81</td>
144 </tr>
145
146 <tr>
147 <td>power_spi_enable()</td>
148 <td>Enable the Serial Peripheral Interface module.</td>
149 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
150 </tr>
151
152 <tr>
153 <td>power_spi_disable()</td>
154 <td>Disable the Serial Peripheral Interface module.</td>
155 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
156 </tr>
157
158 <tr>
159 <td>power_timer0_enable()</td>
160 <td>Enable the Timer 0 module.</td>
161 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM216, AT90PWM316, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
162 </tr>
163
164 <tr>
165 <td>power_timer0_disable()</td>
166 <td>Disable the Timer 0 module.</td>
167 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
168 </tr>
169
170 <tr>
171 <td>power_timer1_enable()</td>
172 <td>Enable the Timer 1 module.</td>
173 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
174 </tr>
175
176 <tr>
177 <td>power_timer1_disable()</td>
178 <td>Disable the Timer 1 module.</td>
179 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, AT90PWM81, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
180 </tr>
181
182 <tr>
183 <td>power_timer2_enable()</td>
184 <td>Enable the Timer 2 module.</td>
185 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
186 </tr>
187
188 <tr>
189 <td>power_timer2_disable()</td>
190 <td>Disable the Timer 2 module.</td>
191 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
192 </tr>
193
194 <tr>
195 <td>power_timer3_enable()</td>
196 <td>Enable the Timer 3 module.</td>
197 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
198 </tr>
199
200 <tr>
201 <td>power_timer3_disable()</td>
202 <td>Disable the Timer 3 module.</td>
203 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
204 </tr>
205
206 <tr>
207 <td>power_timer4_enable()</td>
208 <td>Enable the Timer 4 module.</td>
209 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
210 </tr>
211
212 <tr>
213 <td>power_timer4_disable()</td>
214 <td>Disable the Timer 4 module.</td>
215 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
216 </tr>
217
218 <tr>
219 <td>power_timer5_enable()</td>
220 <td>Enable the Timer 5 module.</td>
221 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
222 </tr>
223
224 <tr>
225 <td>power_timer5_disable()</td>
226 <td>Disable the Timer 5 module.</td>
227 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561</td>
228 </tr>
229
230 <tr>
231 <td>power_twi_enable()</td>
232 <td>Enable the Two Wire Interface module.</td>
233 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168</td>
234 </tr>
235
236 <tr>
237 <td>power_twi_disable()</td>
238 <td>Disable the Two Wire Interface module.</td>
239 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168</td>
240 </tr>
241
242 <tr>
243 <td>power_usart_enable()</td>
244 <td>Enable the USART module.</td>
245 <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
246 </tr>
247
248 <tr>
249 <td>power_usart_disable()</td>
250 <td>Disable the USART module.</td>
251 <td>AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B</td>
252 </tr>
253
254 <tr>
255 <td>power_usart0_enable()</td>
256 <td>Enable the USART 0 module.</td>
257 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
258 </tr>
259
260 <tr>
261 <td>power_usart0_disable()</td>
262 <td>Disable the USART 0 module.</td>
263 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega3250A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega48, ATmega88, ATmega168</td>
264 </tr>
265
266 <tr>
267 <td>power_usart1_enable()</td>
268 <td>Enable the USART 1 module.</td>
269 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644</td>
270 </tr>
271
272 <tr>
273 <td>power_usart1_disable()</td>
274 <td>Disable the USART 1 module.</td>
275 <td>ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, ATmega164P, ATmega324P, ATmega644</td>
276 </tr>
277
278 <tr>
279 <td>power_usart2_enable()</td>
280 <td>Enable the USART 2 module.</td>
281 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
282 </tr>
283
284 <tr>
285 <td>power_usart2_disable()</td>
286 <td>Disable the USART 2 module.</td>
287 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
288 </tr>
289
290 <tr>
291 <td>power_usart3_enable()</td>
292 <td>Enable the USART 3 module.</td>
293 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
294 </tr>
295
296 <tr>
297 <td>power_usart3_disable()</td>
298 <td>Disable the USART 3 module.</td>
299 <td>ATmega640, ATmega1280, ATmega1281, ATmega2560, ATmega2561</td>
300 </tr>
301
302 <tr>
303 <td>power_usb_enable()</td>
304 <td>Enable the USB module.</td>
305 <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
306 </tr>
307
308 <tr>
309 <td>power_usb_disable()</td>
310 <td>Disable the USB module.</td>
311 <td>AT90USB646, AT90USB647, AT90USB1286, AT90USB1287</td>
312 </tr>
313
314 <tr>
315 <td>power_usi_enable()</td>
316 <td>Enable the Universal Serial Interface module.</td>
317 <td>ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
318 </tr>
319
320 <tr>
321 <td>power_usi_disable()</td>
322 <td>Disable the Universal Serial Interface module.</td>
323 <td>ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
324 </tr>
325
326 <tr>
327 <td>power_vadc_enable()</td>
328 <td>Enable the Voltage ADC module.</td>
329 <td>ATmega406</td>
330 </tr>
331
332 <tr>
333 <td>power_vadc_disable()</td>
334 <td>Disable the Voltage ADC module.</td>
335 <td>ATmega406</td>
336 </tr>
337
338 <tr>
339 <td>power_all_enable()</td>
340 <td>Enable all modules.</td>
341 <td>ATxmega6A4, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmegaA1, ATxmegaA1U, ATxmega128A3, ATxmega192A3, ATxmega256A3, ATxmegaA3B, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3, ATxmega192D3, ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega325A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
342 </tr>
343
344 <tr>
345 <td>power_all_disable()</td>
346 <td>Disable all modules.</td>
347 <td>ATxmega6A4, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmegaA1, ATxmegaA1U, ATxmega128A3, ATxmega192A3, ATxmega256A3, ATxmegaA3B, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3,ATxmega192D3, ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega3250, ATmega325A, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861</td>
348 </tr>
349 </table>
350 </center>
351 </small>
352
353 @} */
354
355 // Xmega A series has AES, EBI and DMA bits
356 // Include any other device on need basis
357 #if defined(__AVR_ATxmega16A4__) \
358 || defined(__AVR_ATxmega32A4__) \
359 || defined(__AVR_ATxmega64A1__) \
360 || defined(__AVR_ATxmega64A1U__) \
361 || defined(__AVR_ATxmega64A3__) \
362 || defined(__AVR_ATxmega128A1__) \
363 || defined(__AVR_ATxmega128A1U__) \
364 || defined(__AVR_ATxmega128A3__) \
365 || defined(__AVR_ATxmega192A3__) \
366 || defined(__AVR_ATxmega256A3__) \
367 || defined(__AVR_ATxmega256A3B__)
368
369 #define power_aes_enable() (PR_PRGEN &= (uint8_t)~(PR_AES_bm))
370 #define power_aes_disable() (PR_PRGEN |= (uint8_t)PR_AES_bm)
371
372 #define power_ebi_enable() (PR_PRGEN &= (uint8_t)~(PR_EBI_bm))
373 #define power_ebi_disable() (PR_PRGEN |= (uint8_t)PR_EBI_bm)
374
375 #define power_dma_enable() (PR_PRGEN &= (uint8_t)~(PR_DMA_bm))
376 #define power_dma_disable() (PR_PRGEN |= (uint8_t)PR_DMA_bm)
377
378 #define power_daca_enable() (PR_PRPA &= (uint8_t)~(PR_DAC_bm))
379 #define power_daca_disable() (PR_PRPA |= (uint8_t)PR_DAC_bm)
380 #define power_dacb_enable() (PR_PRPB &= (uint8_t)~(PR_DAC_bm))
381 #define power_dacb_disable() (PR_PRPB |= (uint8_t)PR_DAC_bm)
382
383 #define power_usartc1_enable() (PR_PRPC &= (uint8_t)~(PR_USART1_bm))
384 #define power_usartc1_disable() (PR_PRPC |= (uint8_t)PR_USART1_bm)
385 #define power_usartd1_enable() (PR_PRPD &= (uint8_t)~(PR_USART1_bm))
386 #define power_usartd1_disable() (PR_PRPD |= (uint8_t)PR_USART1_bm)
387 #define power_usarte1_enable() (PR_PRPE &= (uint8_t)~(PR_USART1_bm))
388 #define power_usarte1_disable() (PR_PRPE |= (uint8_t)PR_USART1_bm)
389 #define power_usartf1_enable() (PR_PRPF &= (uint8_t)~(PR_USART1_bm))
390 #define power_usartf1_disable() (PR_PRPF |= (uint8_t)PR_USART1_bm)
391
392 #define power_all_enable() \
393 do { \
394 PR_PRGEN &= (uint8_t)~(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
395 PR_PRPA &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
396 PR_PRPB &= (uint8_t)~(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
397 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
398 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
399 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
400 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
401 } while(0)
402
403
404 #define power_all_disable() \
405 do { \
406 PR_PRGEN|= (uint8_t)(PR_AES_bm|PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
407 PR_PRPA |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
408 PR_PRPB |= (uint8_t)(PR_DAC_bm|PR_ADC_bm|PR_AC_bm); \
409 PR_PRPC |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
410 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
411 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
412 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART1_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
413 } while(0)
414 #endif
415
416 #if defined(__AVR_ATxmega16A4__) \
417 || defined(__AVR_ATxmega16D4__) \
418 || defined(__AVR_ATxmega32A4__) \
419 || defined(__AVR_ATxmega32D4__) \
420 || defined(__AVR_ATxmega64A1__) \
421 || defined(__AVR_ATxmega64A1U__) \
422 || defined(__AVR_ATxmega64A3__) \
423 || defined(__AVR_ATxmega64D3__) \
424 || defined(__AVR_ATxmega128A1__) \
425 || defined(__AVR_ATxmega128A1U__) \
426 || defined(__AVR_ATxmega128A3__) \
427 || defined(__AVR_ATxmega128D3__) \
428 || defined(__AVR_ATxmega192A3__) \
429 || defined(__AVR_ATxmega192D3__) \
430 || defined(__AVR_ATxmega256A3__) \
431 || defined(__AVR_ATxmega256A3B__)
432
433
434 #define power_rtc_enable() (PR_PRGEN &= (uint8_t)~(PR_RTC_bm))
435 #define power_rtc_disable() (PR_PRGEN |= (uint8_t)PR_RTC_bm)
436
437 #define power_evsys_enable() (PR_PRGEN &= (uint8_t)~(PR_EVSYS_bm))
438 #define power_evsys_disable() (PR_PRGEN |= (uint8_t)PR_EVSYS_bm)
439
440 #define power_adca_enable() (PR_PRPA &= (uint8_t)~(PR_ADC_bm))
441 #define power_adca_disable() (PR_PRPA |= (uint8_t)PR_ADC_bm)
442 #define power_adcb_enable() (PR_PRPB &= (uint8_t)~(PR_ADC_bm))
443 #define power_adcb_disable() (PR_PRPB |= (uint8_t)PR_ADC_bm)
444
445 #define power_aca_enable() (PR_PRPA &= (uint8_t)~(PR_AC_bm))
446 #define power_aca_disable() (PR_PRPA |= (uint8_t)PR_AC_bm)
447 #define power_acb_enable() (PR_PRPB &= (uint8_t)~(PR_AC_bm))
448 #define power_acb_disable() (PR_PRPB |= (uint8_t)PR_AC_bm)
449
450 #define power_twic_enable() (PR_PRPC &= (uint8_t)~(PR_TWI_bm))
451 #define power_twic_disable() (PR_PRPC |= (uint8_t)PR_TWI_bm)
452 #define power_twid_enable() (PR_PRPD &= (uint8_t)~(PR_TWI_bm))
453 #define power_twid_disable() (PR_PRPD |= (uint8_t)PR_TWI_bm)
454 #define power_twie_enable() (PR_PRPE &= (uint8_t)~(PR_TWI_bm))
455 #define power_twie_disable() (PR_PRPE |= (uint8_t)PR_TWI_bm)
456 #define power_twif_enable() (PR_PRPF &= (uint8_t)~(PR_TWI_bm))
457 #define power_twif_disable() (PR_PRPF |= (uint8_t)PR_TWI_bm)
458
459 #define power_usartc0_enable() (PR_PRPC &= (uint8_t)~(PR_USART0_bm))
460 #define power_usartc0_disable() (PR_PRPC |= (uint8_t)PR_USART0_bm)
461 #define power_usartd0_enable() (PR_PRPD &= (uint8_t)~(PR_USART0_bm))
462 #define power_usartd0_disable() (PR_PRPD |= (uint8_t)PR_USART0_bm)
463 #define power_usarte0_enable() (PR_PRPE &= (uint8_t)~(PR_USART0_bm))
464 #define power_usarte0_disable() (PR_PRPE |= (uint8_t)PR_USART0_bm)
465 #define power_usartf0_enable() (PR_PRPF &= (uint8_t)~(PR_USART0_bm))
466 #define power_usartf0_disable() (PR_PRPF |= (uint8_t)PR_USART0_bm)
467
468 #define power_spic_enable() (PR_PRPC &= (uint8_t)~(PR_SPI_bm))
469 #define power_spic_disable() (PR_PRPC |= (uint8_t)PR_SPI_bm)
470 #define power_spid_enable() (PR_PRPD &= (uint8_t)~(PR_SPI_bm))
471 #define power_spid_disable() (PR_PRPD |= (uint8_t)PR_SPI_bm)
472 #define power_spie_enable() (PR_PRPE &= (uint8_t)~(PR_SPI_bm))
473 #define power_spie_disable() (PR_PRPE |= (uint8_t)PR_SPI_bm)
474 #define power_spif_enable() (PR_PRPF &= (uint8_t)~(PR_SPI_bm))
475 #define power_spif_disable() (PR_PRPF |= (uint8_t)PR_SPI_bm)
476
477 #define power_hiresc_enable() (PR_PRPC &= (uint8_t)~(PR_HIRES_bm))
478 #define power_hiresc_disable() (PR_PRPC |= (uint8_t)PR_HIRES_bm)
479 #define power_hiresd_enable() (PR_PRPD &= (uint8_t)~(PR_HIRES_bm))
480 #define power_hiresd_disable() (PR_PRPD |= (uint8_t)PR_HIRES_bm)
481 #define power_hirese_enable() (PR_PRPE &= (uint8_t)~(PR_HIRES_bm))
482 #define power_hirese_disable() (PR_PRPE |= (uint8_t)PR_HIRES_bm)
483 #define power_hiresf_enable() (PR_PRPF &= (uint8_t)~(PR_HIRES_bm))
484 #define power_hiresf_disable() (PR_PRPF |= (uint8_t)PR_HIRES_bm)
485
486 #define power_tc1c_enable() (PR_PRPC &= (uint8_t)~(PR_TC1_bm))
487 #define power_tc1c_disable() (PR_PRPC |= (uint8_t)PR_TC1_bm)
488 #define power_tc1d_enable() (PR_PRPD &= (uint8_t)~(PR_TC1_bm))
489 #define power_tc1d_disable() (PR_PRPD |= (uint8_t)PR_TC1_bm)
490 #define power_tc1e_enable() (PR_PRPE &= (uint8_t)~(PR_TC1_bm))
491 #define power_tc1e_disable() (PR_PRPE |= (uint8_t)PR_TC1_bm)
492 #define power_tc1f_enable() (PR_PRPF &= (uint8_t)~(PR_TC1_bm))
493 #define power_tc1f_disable() (PR_PRPF |= (uint8_t)PR_TC1_bm)
494
495 #define power_tc0c_enable() (PR_PRPC &= (uint8_t)~(PR_TC0_bm))
496 #define power_tc0c_disable() (PR_PRPC |= (uint8_t)PR_TC0_bm)
497 #define power_tc0d_enable() (PR_PRPD &= (uint8_t)~(PR_TC0_bm))
498 #define power_tc0d_disable() (PR_PRPD |= (uint8_t)PR_TC0_bm)
499 #define power_tc0e_enable() (PR_PRPE &= (uint8_t)~(PR_TC0_bm))
500 #define power_tc0e_disable() (PR_PRPE |= (uint8_t)PR_TC0_bm)
501 #define power_tc0f_enable() (PR_PRPF &= (uint8_t)~(PR_TC0_bm))
502 #define power_tc0f_disable() (PR_PRPF |= (uint8_t)PR_TC0_bm)
503
504 #endif
505
506 #if defined(__AVR_ATxmega16D4__) \
507 || defined(__AVR_ATxmega32D4__) \
508 || defined(__AVR_ATxmega64D3__) \
509 || defined(__AVR_ATxmega128D3__) \
510 || defined(__AVR_ATxmega192D3__)
511
512 #define power_all_enable() \
513 do { \
514 PR_PRGEN &= (uint8_t)~(PR_RTC_bm|PR_EVSYS_bm); \
515 PR_PRPA &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
516 PR_PRPB &= (uint8_t)~(PR_ADC_bm|PR_AC_bm); \
517 PR_PRPC &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
518 PR_PRPD &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
519 PR_PRPE &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
520 PR_PRPF &= (uint8_t)~(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
521 } while(0)
522
523
524 #define power_all_disable() \
525 do { \
526 PR_PRGEN|= (uint8_t)(PR_EBI_bm|PR_RTC_bm|PR_EVSYS_bm|PR_DMA_bm); \
527 PR_PRPA |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
528 PR_PRPB |= (uint8_t)(PR_ADC_bm|PR_AC_bm); \
529 PR_PRPC |= (uint8_t)(PR_TWI_bm|R_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
530 PR_PRPD |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
531 PR_PRPE |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
532 PR_PRPF |= (uint8_t)(PR_TWI_bm|PR_USART0_bm|PR_SPI_bm|PR_HIRES_bm|PR_TC1_bm|PR_TC0_bm); \
533 } while(0)
534
535 #elif defined(__AVR_ATmega640__) \
536 || defined(__AVR_ATmega1280__) \
537 || defined(__AVR_ATmega1281__) \
538 || defined(__AVR_ATmega2560__) \
539 || defined(__AVR_ATmega2561__)
540
541 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
542 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
543
544 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
545 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
546
547 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
548 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
549
550 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
551 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
552
553 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
554 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
555
556 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
557 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
558
559 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
560 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
561
562 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
563 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
564
565 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
566 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
567
568 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
569 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
570
571 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
572 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
573
574 #define power_usart2_enable() (PRR1 &= (uint8_t)~(1 << PRUSART2))
575 #define power_usart2_disable() (PRR1 |= (uint8_t)(1 << PRUSART2))
576
577 #define power_usart3_enable() (PRR1 &= (uint8_t)~(1 << PRUSART3))
578 #define power_usart3_disable() (PRR1 |= (uint8_t)(1 << PRUSART3))
579
580 #define power_all_enable() \
581 do{ \
582 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
583 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
584 }while(0)
585
586 #define power_all_disable() \
587 do{ \
588 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
589 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)|(1<<PRUSART2)|(1<<PRUSART3)); \
590 }while(0)
591
592
593 #elif defined(__AVR_ATmega128RFA1__)
594
595 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
596 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
597
598 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
599 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
600
601 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
602 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
603
604 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
605 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
606
607 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
608 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
609
610 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
611 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
612
613 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
614 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
615
616 #define power_timer4_enable() (PRR1 &= (uint8_t)~(1 << PRTIM4))
617 #define power_timer4_disable() (PRR1 |= (uint8_t)(1 << PRTIM4))
618
619 #define power_timer5_enable() (PRR1 &= (uint8_t)~(1 << PRTIM5))
620 #define power_timer5_disable() (PRR1 |= (uint8_t)(1 << PRTIM5))
621
622 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
623 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
624
625 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
626 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
627
628 #define power_all_enable() \
629 do{ \
630 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
631 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
632 }while(0)
633
634 #define power_all_disable() \
635 do{ \
636 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)); \
637 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRTIM4)|(1<<PRTIM5)|(1<<PRTIM5)|(1<<PRUSART1)); \
638 }while(0)
639
640
641 #elif defined(__AVR_AT90USB646__) \
642 || defined(__AVR_AT90USB647__) \
643 || defined(__AVR_AT90USB1286__) \
644 || defined(__AVR_AT90USB1287__)
645
646 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
647 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
648
649 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
650 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
651
652 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
653 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
654
655 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
656 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
657
658 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
659 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
660
661 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
662 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
663
664 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
665 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
666
667 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
668 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
669
670 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
671 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
672
673 #define power_all_enable() \
674 do{ \
675 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
676 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
677 }while(0)
678
679 #define power_all_disable() \
680 do{ \
681 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
682 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
683 }while(0)
684
685
686 #elif defined(__AVR_ATmega32U4__) \
687 || defined(__AVR_ATmega16U4__)
688
689
690 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
691 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
692
693 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
694 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
695
696 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
697 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
698
699 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
700 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
701
702 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
703 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
704
705 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
706 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
707
708 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
709 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
710
711 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
712 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
713
714 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
715 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
716
717 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
718 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
719
720 #define power_all_enable() \
721 do{ \
722 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
723 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
724 }while(0)
725
726 #define power_all_disable() \
727 do{ \
728 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRUSART0)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
729 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
730 }while(0)
731
732
733 #elif defined(__AVR_ATmega32U6__)
734
735
736 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
737 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
738
739 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
740 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
741
742 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
743 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
744
745 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
746 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
747
748 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
749 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
750
751 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
752 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
753
754 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
755 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
756
757 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
758 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
759
760 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
761 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
762
763 #define power_all_enable() \
764 do{ \
765 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
766 PRR1 &= (uint8_t)~((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
767 }while(0)
768
769 #define power_all_disable() \
770 do{ \
771 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)); \
772 PRR1 |= (uint8_t)((1<<PRTIM3)|(1<<PRUSART1)|(1<<PRUSB)); \
773 }while(0)
774
775
776 #elif defined(__AVR_AT90PWM1__)
777
778 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
779 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
780
781 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
782 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
783
784 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
785 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
786
787 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
788 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
789
790 /* Power Stage Controller 0 */
791 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
792 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
793
794 /* Power Stage Controller 1 */
795 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
796 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
797
798 /* Power Stage Controller 2 */
799 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
800 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
801
802 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
803 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
804
805
806 #elif defined(__AVR_AT90PWM2__) \
807 || defined(__AVR_AT90PWM2B__) \
808 || defined(__AVR_AT90PWM3__) \
809 || defined(__AVR_AT90PWM3B__) \
810 || defined(__AVR_AT90PWM216__) \
811 || defined(__AVR_AT90PWM316__)
812
813 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
814 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
815
816 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
817 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
818
819 #define power_usart_enable() (PRR &= (uint8_t)~(1 << PRUSART))
820 #define power_usart_disable() (PRR |= (uint8_t)(1 << PRUSART))
821
822 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
823 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
824
825 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
826 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
827
828 /* Power Stage Controller 0 */
829 #define power_psc0_enable() (PRR &= (uint8_t)~(1 << PRPSC0))
830 #define power_psc0_disable() (PRR |= (uint8_t)(1 << PRPSC0))
831
832 /* Power Stage Controller 1 */
833 #define power_psc1_enable() (PRR &= (uint8_t)~(1 << PRPSC1))
834 #define power_psc1_disable() (PRR |= (uint8_t)(1 << PRPSC1))
835
836 /* Power Stage Controller 2 */
837 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
838 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
839
840 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
841 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC0)|(1<<PRPSC1)|(1<<PRPSC2)))
842
843
844 #elif defined(__AVR_AT90PWM81__)
845
846 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
847 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
848
849 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
850 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
851
852 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
853 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
854
855 /* Reduced Power Stage Controller */
856 #define power_pscr_enable() (PRR &= (uint8_t)~(1 << PRPSCR))
857 #define power_pscr_disable() (PRR |= (uint8_t)(1 << PRPSCR))
858
859 /* Power Stage Controller 2 */
860 #define power_psc2_enable() (PRR &= (uint8_t)~(1 << PRPSC2))
861 #define power_psc2_disable() (PRR |= (uint8_t)(1 << PRPSC2))
862
863 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
864 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRPSCR)|(1<<PRPSC2)))
865
866
867 #elif defined(__AVR_ATmega165__) \
868 || defined(__AVR_ATmega165A__) \
869 || defined(__AVR_ATmega165P__) \
870 || defined(__AVR_ATmega325__) \
871 || defined(__AVR_ATmega325A__) \
872 || defined(__AVR_ATmega3250__) \
873 || defined(__AVR_ATmega3250A__) \
874 || defined(__AVR_ATmega645__) \
875 || defined(__AVR_ATmega645A__) \
876 || defined(__AVR_ATmega645P__) \
877 || defined(__AVR_ATmega6450__) \
878 || defined(__AVR_ATmega6450A__) \
879 || defined(__AVR_ATmega6450P__)
880
881 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
882 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
883
884 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
885 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
886
887 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
888 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
889
890 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
891 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
892
893 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
894 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)))
895
896
897 #elif defined(__AVR_ATmega169__) \
898 || defined(__AVR_ATmega169A__) \
899 || defined(__AVR_ATmega169P__) \
900 || defined(__AVR_ATmega169PA__) \
901 || defined(__AVR_ATmega329__) \
902 || defined(__AVR_ATmega329A__) \
903 || defined(__AVR_ATmega329P__) \
904 || defined(__AVR_ATmega329PA__) \
905 || defined(__AVR_ATmega3290__) \
906 || defined(__AVR_ATmega3290A__) \
907 || defined(__AVR_ATmega3290P__) \
908 || defined(__AVR_ATmega649__) \
909 || defined(__AVR_ATmega649A__) \
910 || defined(__AVR_ATmega649P__) \
911 || defined(__AVR_ATmega6490__) \
912 || defined(__AVR_ATmega6490A__) \
913 || defined(__AVR_ATmega6490P__)
914
915 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
916 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
917
918 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
919 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
920
921 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
922 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
923
924 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
925 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
926
927 #define power_lcd_enable() (PRR &= (uint8_t)~(1 << PRLCD))
928 #define power_lcd_disable() (PRR |= (uint8_t)(1 << PRLCD))
929
930 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
931 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM1)|(1<<PRLCD)))
932
933
934 #elif defined(__AVR_ATmega164A__) \
935 || defined(__AVR_ATmega164P__) \
936 || defined(__AVR_ATmega324A__) \
937 || defined(__AVR_ATmega324P__) \
938 || defined(__AVR_ATmega324PA__) \
939 || defined(__AVR_ATmega644P__) \
940 || defined(__AVR_ATmega644A__) \
941 || defined(__AVR_ATmega644PA__)
942
943 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
944 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
945
946 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
947 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
948
949 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
950 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
951
952 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
953 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
954
955 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
956 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
957
958 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
959 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
960
961 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
962 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
963
964 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
965 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
966
967 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
968 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRUSART1)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
969
970
971 #elif defined(__AVR_ATmega644__)
972
973 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
974 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
975
976 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
977 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
978
979 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
980 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
981
982 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
983 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
984
985 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
986 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
987
988 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
989 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
990
991 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
992 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
993
994 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
995 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
996
997
998 #elif defined(__AVR_ATmega406__)
999
1000 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1001 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1002
1003 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1004 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1005
1006 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1007 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1008
1009 /* Voltage ADC */
1010 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
1011 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
1012
1013 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
1014 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)))
1015
1016
1017 #elif defined(__AVR_ATmega48__) \
1018 || defined(__AVR_ATmega48A__) \
1019 || defined(__AVR_ATmega48P__) \
1020 || defined(__AVR_ATmega88__) \
1021 || defined(__AVR_ATmega88A__) \
1022 || defined(__AVR_ATmega88P__) \
1023 || defined(__AVR_ATmega88PA__) \
1024 || defined(__AVR_ATmega168__) \
1025 || defined(__AVR_ATmega168A__) \
1026 || defined(__AVR_ATmega168P__) \
1027 || defined(__AVR_ATmega328__) \
1028 || defined(__AVR_ATmega328P__) \
1029 || defined(__AVR_ATtiny48__) \
1030 || defined(__AVR_ATtiny88__)
1031
1032 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1033 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1034
1035 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1036 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1037
1038 #define power_usart0_enable() (PRR &= (uint8_t)~(1 << PRUSART0))
1039 #define power_usart0_disable() (PRR |= (uint8_t)(1 << PRUSART0))
1040
1041 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1042 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1043
1044 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1045 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1046
1047 #define power_timer2_enable() (PRR &= (uint8_t)~(1 << PRTIM2))
1048 #define power_timer2_disable() (PRR |= (uint8_t)(1 << PRTIM2))
1049
1050 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
1051 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
1052
1053 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1054 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRUSART0)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRTWI)))
1055
1056
1057 #elif defined(__AVR_ATtiny24__) \
1058 || defined(__AVR_ATtiny24A__) \
1059 || defined(__AVR_ATtiny44__) \
1060 || defined(__AVR_ATtiny44A__) \
1061 || defined(__AVR_ATtiny84__) \
1062 || defined(__AVR_ATtiny84A__) \
1063 || defined(__AVR_ATtiny25__) \
1064 || defined(__AVR_ATtiny45__) \
1065 || defined(__AVR_ATtiny85__) \
1066 || defined(__AVR_ATtiny261__) \
1067 || defined(__AVR_ATtiny261A__) \
1068 || defined(__AVR_ATtiny461__) \
1069 || defined(__AVR_ATtiny461A__) \
1070 || defined(__AVR_ATtiny861__) \
1071 || defined(__AVR_ATtiny861A__) \
1072 || defined(__AVR_ATtiny43U__)
1073
1074 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1075 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1076
1077 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1078 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1079
1080 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1081 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1082
1083 /* Universal Serial Interface */
1084 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
1085 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
1086
1087 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
1088 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRUSI)))
1089
1090
1091 #elif defined(__AVR_ATmega1284P__)
1092
1093
1094 #define power_adc_enable() (PRR0 &= (uint8_t)~(1 << PRADC))
1095 #define power_adc_disable() (PRR0 |= (uint8_t)(1 << PRADC))
1096
1097 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1098 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1099
1100 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1101 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1102
1103 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1104 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1105
1106 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1107 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1108
1109 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1110 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1111
1112 #define power_timer3_enable() (PRR1 &= (uint8_t)~(1 << PRTIM3))
1113 #define power_timer3_disable() (PRR1 |= (uint8_t)(1 << PRTIM3))
1114
1115 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1116 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1117
1118 #define power_usart1_enable() (PRR0 &= (uint8_t)~(1 << PRUSART1))
1119 #define power_usart1_disable() (PRR0 |= (uint8_t)(1 << PRUSART1))
1120
1121 #define power_all_enable() \
1122 do{ \
1123 PRR0 &= (uint8_t)~((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1124 PRR1 &= (uint8_t)~(1<<PRTIM3); \
1125 }while(0)
1126
1127 #define power_all_disable() \
1128 do{ \
1129 PRR0 |= (uint8_t)((1<<PRADC)|(1<<PRSPI)|(1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRTIM2)|(1<<PRUSART0)|(1<<PRUSART1)); \
1130 PRR1 |= (uint8_t)(1<<PRTIM3); \
1131 }while(0)
1132
1133
1134 #elif defined(__AVR_ATmega32HVB__) \
1135 || defined(__AVR_ATmega32HVBREVB__) \
1136 || defined(__AVR_ATmega16HVB__) \
1137 || defined(__AVR_ATmega16HVBREVB__)
1138
1139
1140 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1141 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1142
1143 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1144 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1145
1146 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1147 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1148
1149 /* Voltage ADC */
1150 #define power_vadc_enable() (PRR0 &= (uint8_t)~(1 << PRVADC))
1151 #define power_vadc_disable() (PRR0 |= (uint8_t)(1 << PRVADC))
1152
1153 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1154 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1155
1156 #define power_vrm_enable() (PRR0 &= (uint8_t)~(1 << PRVRM))
1157 #define power_vrm_disable() (PRR0 |= (uint8_t)(1 << PRVRM))
1158
1159 #define power_all_enable() (PRR0 &= (uint8_t)~((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1160 #define power_all_disable() (PRR0 |= (uint8_t)((1<<PRTWI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRVADC)|(1<<PRSPI)|(1<<PRVRM)))
1161
1162
1163 #elif defined(__AVR_ATmega16M1__) \
1164 || defined(__AVR_ATmega32C1__) \
1165 || defined(__AVR_ATmega32M1__) \
1166 || defined(__AVR_ATmega64C1__) \
1167 || defined(__AVR_ATmega64M1__)
1168
1169 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1170 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1171
1172 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
1173 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
1174
1175 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1176 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1177
1178 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1179 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1180
1181 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1182 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1183
1184 #define power_psc_enable() (PRR &= (uint8_t)~(1 << PRPSC))
1185 #define power_psc_disable() (PRR |= (uint8_t)(1 << PRPSC))
1186
1187 #define power_can_enable() (PRR &= (uint8_t)~(1 << PRCAN))
1188 #define power_can_disable() (PRR |= (uint8_t)(1 << PRCAN))
1189
1190 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1191 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRPSC)|(1<<PRCAN)))
1192
1193
1194 #elif defined(__AVR_ATtiny167__) \
1195 || defined(__AVR_ATtiny87__)
1196
1197
1198 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1199 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1200
1201 #define power_usi_enable() (PRR &= (uint8_t)~(1 << PRUSI))
1202 #define power_usi_disable() (PRR |= (uint8_t)(1 << PRUSI))
1203
1204 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1205 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1206
1207 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1208 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1209
1210 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1211 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1212
1213 #define power_lin_enable() (PRR &= (uint8_t)~(1 << PRLIN))
1214 #define power_lin_disable() (PRR |= (uint8_t)(1 << PRLIN))
1215
1216 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1217 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRUSI)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRLIN)))
1218
1219
1220 #elif defined(__AVR_AT90USB82__) \
1221 || defined(__AVR_AT90USB162__) \
1222 || defined(__AVR_ATmega8U2__) \
1223 || defined(__AVR_ATmega16U2__) \
1224 || defined(__AVR_ATmega32U2__)
1225
1226 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1227 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1228
1229 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1230 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1231
1232 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1233 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1234
1235 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
1236 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
1237
1238 #define power_usart1_enable() (PRR1 &= (uint8_t)~(1 << PRUSART1))
1239 #define power_usart1_disable() (PRR1 |= (uint8_t)(1 << PRUSART1))
1240
1241 #define power_all_enable() \
1242 do{ \
1243 PRR0 &= (uint8_t)~((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1244 PRR1 &= (uint8_t)~((1<<PRUSB)|(1<<PRUSART1)); \
1245 }while(0)
1246
1247 #define power_all_disable() \
1248 do{ \
1249 PRR0 |= (uint8_t)((1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)); \
1250 PRR1 |= (uint8_t)((1<<PRUSB)|(1<<PRUSART1)); \
1251 }while(0)
1252
1253
1254 #elif defined(__AVR_AT90SCR100__)
1255
1256 #define power_usart0_enable() (PRR0 &= (uint8_t)~(1 << PRUSART0))
1257 #define power_usart0_disable() (PRR0 |= (uint8_t)(1 << PRUSART0))
1258
1259 #define power_spi_enable() (PRR0 &= (uint8_t)~(1 << PRSPI))
1260 #define power_spi_disable() (PRR0 |= (uint8_t)(1 << PRSPI))
1261
1262 #define power_timer1_enable() (PRR0 &= (uint8_t)~(1 << PRTIM1))
1263 #define power_timer1_disable() (PRR0 |= (uint8_t)(1 << PRTIM1))
1264
1265 #define power_timer0_enable() (PRR0 &= (uint8_t)~(1 << PRTIM0))
1266 #define power_timer0_disable() (PRR0 |= (uint8_t)(1 << PRTIM0))
1267
1268 #define power_timer2_enable() (PRR0 &= (uint8_t)~(1 << PRTIM2))
1269 #define power_timer2_disable() (PRR0 |= (uint8_t)(1 << PRTIM2))
1270
1271 #define power_twi_enable() (PRR0 &= (uint8_t)~(1 << PRTWI))
1272 #define power_twi_disable() (PRR0 |= (uint8_t)(1 << PRTWI))
1273
1274 #define power_usbh_enable() (PRR1 &= (uint8_t)~(1 << PRUSBH))
1275 #define power_usbh_disable() (PRR1 |= (uint8_t)(1 << PRUSBH))
1276
1277 #define power_usb_enable() (PRR1 &= (uint8_t)~(1 << PRUSB))
1278 #define power_usb_disable() (PRR1 |= (uint8_t)(1 << PRUSB))
1279
1280 #define power_hsspi_enable() (PRR1 &= (uint8_t)~(1 << PRHSSPI))
1281 #define power_hsspi_disable() (PRR1 |= (uint8_t)(1 << PRHSSPI))
1282
1283 #define power_sci_enable() (PRR1 &= (uint8_t)~(1 << PRSCI))
1284 #define power_sci_disable() (PRR1 |= (uint8_t)(1 << PRSCI))
1285
1286 #define power_aes_enable() (PRR1 &= (uint8_t)~(1 << PRAES))
1287 #define power_aes_disable() (PRR1 |= (uint8_t)(1 << PRAES))
1288
1289 #define power_kb_enable() (PRR1 &= (uint8_t)~(1 << PRKB))
1290 #define power_kb_disable() (PRR1 |= (uint8_t)(1 << PRKB))
1291
1292 #define power_all_enable() \
1293 do{ \
1294 PRR0 &= (uint8_t)~((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1295 PRR1 &= (uint8_t)~((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1296 }while(0)
1297
1298 #define power_all_disable() \
1299 do{ \
1300 PRR0 |= (uint8_t)((1<<PRUSART0)|(1<<PRSPI)|(1<<PRTIM1)|(1<<PRTIM0)|(1<<PRTIM2)|(1<<PRTWI)); \
1301 PRR1 |= (uint8_t)((1<<PRUSBH)|(1<<PRUSB)|(1<<PRHSSPI)|(1<<PRSCI)|(1<<PRAES)|(1<<PRKB)); \
1302 }while(0)
1303
1304
1305 #elif defined(__AVR_ATtiny4__) \
1306 || defined(__AVR_ATtiny5__) \
1307 || defined(__AVR_ATtiny9__) \
1308 || defined(__AVR_ATtiny10__) \
1309 || defined(__AVR_ATtiny13A__) \
1310
1311 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1312 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1313
1314 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1315 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1316
1317 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)))
1318 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)))
1319
1320
1321 #elif defined(__AVR_ATtiny20__) \
1322 || defined(__AVR_ATtiny40__)
1323
1324 #define power_adc_enable() (PRR &= (uint8_t)~(1 << PRADC))
1325 #define power_adc_disable() (PRR |= (uint8_t)(1 << PRADC))
1326
1327 #define power_timer0_enable() (PRR &= (uint8_t)~(1 << PRTIM0))
1328 #define power_timer0_disable() (PRR |= (uint8_t)(1 << PRTIM0))
1329
1330 #define power_timer1_enable() (PRR &= (uint8_t)~(1 << PRTIM1))
1331 #define power_timer1_disable() (PRR |= (uint8_t)(1 << PRTIM1))
1332
1333 #define power_spi_enable() (PRR &= (uint8_t)~(1 << PRSPI))
1334 #define power_spi_disable() (PRR |= (uint8_t)(1 << PRSPI))
1335
1336 #define power_twi_enable() (PRR &= (uint8_t)~(1 << PRTWI))
1337 #define power_twi_disable() (PRR |= (uint8_t)(1 << PRTWI))
1338
1339 #define power_all_enable() (PRR &= (uint8_t)~((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
1340 #define power_all_disable() (PRR |= (uint8_t)((1<<PRADC)|(1<<PRTIM0)|(1<<PRTIM1)|(1<<PRSPI)|(1<<PRTWI)))
1341
1342 #endif
1343
1344
1345 #if defined(__AVR_AT90CAN32__) \
1346 || defined(__AVR_AT90CAN64__) \
1347 || defined(__AVR_AT90CAN128__) \
1348 || defined(__AVR_AT90PWM1__) \
1349 || defined(__AVR_AT90PWM2__) \
1350 || defined(__AVR_AT90PWM2B__) \
1351 || defined(__AVR_AT90PWM3__) \
1352 || defined(__AVR_AT90PWM3B__) \
1353 || defined(__AVR_AT90PWM216__) \
1354 || defined(__AVR_AT90PWM316__) \
1355 || defined(__AVR_AT90SCR100__) \
1356 || defined(__AVR_AT90USB646__) \
1357 || defined(__AVR_AT90USB647__) \
1358 || defined(__AVR_AT90USB82__) \
1359 || defined(__AVR_AT90USB1286__) \
1360 || defined(__AVR_AT90USB1287__) \
1361 || defined(__AVR_AT90USB162__) \
1362 || defined(__AVR_ATmega1280__) \
1363 || defined(__AVR_ATmega1281__) \
1364 || defined(__AVR_ATmega128RFA1__) \
1365 || defined(__AVR_ATmega1284P__) \
1366 || defined(__AVR_ATmega162__) \
1367 || defined(__AVR_ATmega164A__) \
1368 || defined(__AVR_ATmega164P__) \
1369 || defined(__AVR_ATmega165__) \
1370 || defined(__AVR_ATmega165A__) \
1371 || defined(__AVR_ATmega165P__) \
1372 || defined(__AVR_ATmega168__) \
1373 || defined(__AVR_ATmega168P__) \
1374 || defined(__AVR_ATmega169__) \
1375 || defined(__AVR_ATmega169A__) \
1376 || defined(__AVR_ATmega169P__) \
1377 || defined(__AVR_ATmega169PA__) \
1378 || defined(__AVR_ATmega16U4__) \
1379 || defined(__AVR_ATmega2560__) \
1380 || defined(__AVR_ATmega2561__) \
1381 || defined(__AVR_ATmega324A__) \
1382 || defined(__AVR_ATmega324P__) \
1383 || defined(__AVR_ATmega325__) \
1384 || defined(__AVR_ATmega325A__) \
1385 || defined(__AVR_ATmega3250__) \
1386 || defined(__AVR_ATmega3250A__) \
1387 || defined(__AVR_ATmega328__) \
1388 || defined(__AVR_ATmega328P__) \
1389 || defined(__AVR_ATmega329__) \
1390 || defined(__AVR_ATmega329A__) \
1391 || defined(__AVR_ATmega329P__) \
1392 || defined(__AVR_ATmega329PA__) \
1393 || defined(__AVR_ATmega3290__) \
1394 || defined(__AVR_ATmega3290A__) \
1395 || defined(__AVR_ATmega32C1__) \
1396 || defined(__AVR_ATmega32HVB__) \
1397 || defined(__AVR_ATmega32HVBREVB__) \
1398 || defined(__AVR_ATmega16HVB__) \
1399 || defined(__AVR_ATmega16HVBREVB__) \
1400 || defined(__AVR_ATmega32M1__) \
1401 || defined(__AVR_ATmega32U2__) \
1402 || defined(__AVR_ATmega32U4__) \
1403 || defined(__AVR_ATmega32U6__) \
1404 || defined(__AVR_ATmega48__) \
1405 || defined(__AVR_ATmega48P__) \
1406 || defined(__AVR_ATmega640__) \
1407 || defined(__AVR_ATmega649P__) \
1408 || defined(__AVR_ATmega644__) \
1409 || defined(__AVR_ATmega644A__) \
1410 || defined(__AVR_ATmega644P__) \
1411 || defined(__AVR_ATmega644PA__) \
1412 || defined(__AVR_ATmega645__) \
1413 || defined(__AVR_ATmega645A__) \
1414 || defined(__AVR_ATmega645P__) \
1415 || defined(__AVR_ATmega6450__) \
1416 || defined(__AVR_ATmega6450A__) \
1417 || defined(__AVR_ATmega6450P__) \
1418 || defined(__AVR_ATmega649__) \
1419 || defined(__AVR_ATmega649A__) \
1420 || defined(__AVR_ATmega6490__) \
1421 || defined(__AVR_ATmega6490A__) \
1422 || defined(__AVR_ATmega6490P__) \
1423 || defined(__AVR_ATmega88__) \
1424 || defined(__AVR_ATmega88P__) \
1425 || defined(__AVR_ATmega8U2__) \
1426 || defined(__AVR_ATmega16U2__) \
1427 || defined(__AVR_ATmega32U2__) \
1428 || defined(__AVR_ATtiny48__) \
1429 || defined(__AVR_ATtiny167__) \
1430 || defined(__DOXYGEN__)
1431
1432
1433 /** \addtogroup avr_power
1434
1435 Some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that
1436 allows you to decrease the system clock frequency and the power consumption
1437 when the need for processing power is low. Below are two macros and an
1438 enumerated type that can be used to interface to the Clock Prescale Register.
1439
1440 \note Not all AVR devices have a Clock Prescale Register. On those devices
1441 without a Clock Prescale Register, these macros are not available.
1442 */
1443
1444
1445 /** \addtogroup avr_power
1446 \code
1447 typedef enum
1448 {
1449 clock_div_1 = 0,
1450 clock_div_2 = 1,
1451 clock_div_4 = 2,
1452 clock_div_8 = 3,
1453 clock_div_16 = 4,
1454 clock_div_32 = 5,
1455 clock_div_64 = 6,
1456 clock_div_128 = 7,
1457 clock_div_256 = 8,
1458 clock_div_1_rc = 15, // ATmega128RFA1 only
1459 } clock_div_t;
1460 \endcode
1461 Clock prescaler setting enumerations.
1462
1463 */
1464 typedef enum
1465 {
1466 clock_div_1 = 0,
1467 clock_div_2 = 1,
1468 clock_div_4 = 2,
1469 clock_div_8 = 3,
1470 clock_div_16 = 4,
1471 clock_div_32 = 5,
1472 clock_div_64 = 6,
1473 clock_div_128 = 7,
1474 clock_div_256 = 8
1475 #if defined(__AVR_ATmega128RFA1__)
1476 , clock_div_1_rc = 15
1477 #endif
1478 } clock_div_t;
1479
1480
1481 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1482
1483 /** \addtogroup avr_power
1484 \code clock_prescale_set(x) \endcode
1485
1486 Set the clock prescaler register select bits, selecting a system clock
1487 division setting. This function is inlined, even if compiler
1488 optimizations are disabled.
1489
1490 The type of x is clock_div_t.
1491 */
1492 void clock_prescale_set(clock_div_t __x)
1493 {
1494 uint8_t __tmp = _BV(CLKPCE);
1495 __asm__ __volatile__ (
1496 "in __tmp_reg__,__SREG__" "\n\t"
1497 "cli" "\n\t"
1498 "sts %1, %0" "\n\t"
1499 "sts %1, %2" "\n\t"
1500 "out __SREG__, __tmp_reg__"
1501 : /* no outputs */
1502 : "d" (__tmp),
1503 "M" (_SFR_MEM_ADDR(CLKPR)),
1504 "d" (__x)
1505 : "r0");
1506 }
1507
1508 /** \addtogroup avr_power
1509 \code clock_prescale_get() \endcode
1510 Gets and returns the clock prescaler register setting. The return type is clock_div_t.
1511
1512 */
1513 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1514
1515
1516 #elif defined(__AVR_ATtiny24__) \
1517 || defined(__AVR_ATtiny24A__) \
1518 || defined(__AVR_ATtiny44__) \
1519 || defined(__AVR_ATtiny44A__) \
1520 || defined(__AVR_ATtiny84__) \
1521 || defined(__AVR_ATtiny84A__) \
1522 || defined(__AVR_ATtiny25__) \
1523 || defined(__AVR_ATtiny45__) \
1524 || defined(__AVR_ATtiny85__) \
1525 || defined(__AVR_ATtiny261A__) \
1526 || defined(__AVR_ATtiny261__) \
1527 || defined(__AVR_ATtiny461__) \
1528 || defined(__AVR_ATtiny461A__) \
1529 || defined(__AVR_ATtiny861__) \
1530 || defined(__AVR_ATtiny861A__) \
1531 || defined(__AVR_ATtiny2313__) \
1532 || defined(__AVR_ATtiny2313A__) \
1533 || defined(__AVR_ATtiny4313__) \
1534 || defined(__AVR_ATtiny13__) \
1535 || defined(__AVR_ATtiny13A__) \
1536 || defined(__AVR_ATtiny43U__) \
1537
1538 typedef enum
1539 {
1540 clock_div_1 = 0,
1541 clock_div_2 = 1,
1542 clock_div_4 = 2,
1543 clock_div_8 = 3,
1544 clock_div_16 = 4,
1545 clock_div_32 = 5,
1546 clock_div_64 = 6,
1547 clock_div_128 = 7,
1548 clock_div_256 = 8
1549 } clock_div_t;
1550
1551 static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
1552
1553 void clock_prescale_set(clock_div_t __x)
1554 {
1555 uint8_t __tmp = _BV(CLKPCE);
1556 __asm__ __volatile__ (
1557 "in __tmp_reg__,__SREG__" "\n\t"
1558 "cli" "\n\t"
1559 "out %1, %0" "\n\t"
1560 "out %1, %2" "\n\t"
1561 "out __SREG__, __tmp_reg__"
1562 : /* no outputs */
1563 : "d" (__tmp),
1564 "I" (_SFR_IO_ADDR(CLKPR)),
1565 "d" (__x)
1566 : "r0");
1567 }
1568
1569
1570 #define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
1571
1572
1573 #endif
1574
1575
1576
1577
1578 #endif /* _AVR_POWER_H_ */

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